5 days old

Pre-Silicon Verification engineer/Lead (PCIe/CXL, IOMMU)

Santa Clara, CA 95050
  • Job Code
Job Description

The world is transforming and so is Intel!  Here at Intel, we believe the world needs technology that can enrich the lives of every person on earth. We work every single day to design and manufacture silicon products that empower peoples digital lives. Do you love to solve technical challenges that no one has solved yet? Do you enjoy working with cross functional teams to deliver solutions for products that impact customers lives? If so, Come join us to do something wonderful!

The IPG (IP Engineering Group) is looking for energetic and passionate senior Verification (Pre-Silicon Validation) leaders to develop high speed, state of the art complex digital IO controller 'bug free' designs (like PCIe, UPI, CXL, IOMMU etc).

Your responsivities will include but not limited to:

  • Define and develop test env to verify the IP/Sub System functionality.
  • Define Test plans and develop Tests contents.
  • Define Checkers/monitors strategy
  • Define and Develop Assertions
  • Define Cover points and analyze functional coverage with analysis.
  • Define Volume regressions strategy and run simulations followed by failure debugs.
  • Develop formal verification assertions, properties.
  • Define and perform Performance Verification.
  • Mentoring and coaching junior verification engineers .
  • Leadership to manage stake holders with end to end objectives in mind.

The candidate should have ability to work effectively with both internal and external teams/stakeholders. Should possess strong problem solving/communication skills. Should be a very good team player.


You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:

Candidate should possess a Bachelor's degree in Electrical, Electronics, Computer Engineering or Computer Science or any related field with 4+ years' experience -OR - a Master's degree Electrical, Electronics, Computer Engineering or Computer Science or any related field with 3+ years experience -OR- PhD degree in Electrical, Electronics, Computer Engineering or Computer Science or any related field with 1+ years experience.

  • VLSI
  • Verification/validation tests.
  • Expertise in System Verilog/C++/OVM or UVM methodology and/or Formal Verification techniques.

Preferred qualification:

  • System simulation models, and debugging RTL/tests.
  • High speed serial links IPs (PCIe, UPI, CXL, IOMMU etc).

Inside this Business Group

In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intels products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moores Law and groundbreaking innovations.  DEG is Intels engineering group, supplying silicon to business units as well as other engineering teams.  As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.

Other Locations

US, Arizona, Phoenix;US, California, Folsom;US, Colorado, Fort Collins;US, Massachusetts, Hudson;US, Oregon, Hillsboro;US, Texas, Austin

Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Annual Salary Range for jobs which could be performed in US, Colorado:

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, and benefit programs. Find more information about our Amazing Benefits here

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.

Posted: 2022-08-03 Expires: 2022-09-03

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Pre-Silicon Verification engineer/Lead (PCIe/CXL, IOMMU)

Santa Clara, CA 95050

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