10 days old

Principal Engineer- EDA Engineering

Intel
Santa Clara, CA 95050
  • Job Code
    JR0216919
Job Description

Intel is in the midst of an exciting transformation, with a vision to create and extend computing technology to connect and enrich the lives of every person on Earth. Intel's PDE group is at the core of enabling Intel Foundry Services plan to become a world leading Foundry provider.
 

Principal Engineers in the PDE group play a critical role in driving innovation at a regular cadence which is key to process technology leadership and unlocking the potential of Intel's IFS strategy. Intel looks for its technical leaders to leverage their talents and magnify their impact through excellent collaboration with other technical teams inside and outside of PDE.

PDE is looking for a principal engineer to drive and manage the engagement between Intel design/design automation/solutions/design enablement teams and EDA suppliers


Responsibilities include but are not limited to:

  • Executing the global EDA strategy and driving EDA enablement of Intel IDM 2.0 process nodes. EDA supplier management tasks include industry analysis, risk management, quality management programs including the analysis of supplier capabilities and performance assessments.
  • IFS related tasks will include driving EDA collaborations for tools and features, PDK and flow enablement, DTCO, STCO for multiple suppliers on multiple process nodes.
  • Review of EDA technical publications for compliance to Intel standards, facilitation of supplier Technology Roadmap Meetings, initiation and support of Tool User Groups, management of the EDA software evaluation process and support for all related collateral, including CNDAs, RUNDAs, and SOWs.

You will work closely with our Global License and Contracts Negotiation and Compliance Teams along with our technical partners who define and develop Intel PDKs as well as support partners in Intel Legal and Finance.

Some travel may be required.

The ideal candidate should exhibit the following behavioral traits:

Self-motivated, flexible individual comfortable with working independently as well as in a multi-site team and should have a tolerance for dealing with ambiguity.

Demonstrate customer orientation skills, should have excellent written, verbal, and presentation skills, as well as the willingness to multi-task, since you will be providing service to the internal engineering community and IFS.

Detail oriented and comfortable working in an office environment with very senior team members.

Problem-solving that demonstrates a willingness to use multiple resources to resolve customer issues and should be proficient in the documentation of procedures as they are developed.

Communication and influencing skills are required since most of our communications with internal customers, partners, and external suppliers are via telephone and email.

The ideal candidate must exhibit the following skills/experiences and behavioral traits:

  • 10+ years of experience working in a CAD engineering team in a large organization
  • 10+ of experience with tools and flows from EDA vendors like Cadence and Synopsys
  • Effectively communicate, collaborate and align with internal and external stakeholders
  • Ability to be self-directing, show initiative and work with diverse teams in a dynamic environment
  • Exhibits skills to integrate in depth knowledge of several disciplines and ability to lead development and implementation of highly advanced strategies and concepts
  • Demonstrated skills in building a vibrant and inclusive organizational culture
  • Experience working in roles that require both daily tactical consistency as well as long term strategy definition and roadmap execution.


Qualifications

Degree in Electrical Engineering, or a closely related field.

Inside this Business Group

As an integral part of Intel's new IDM2.0 strategy, we establish Intel Foundry Services (IFS), a fully vertical, standalone foundry business, reporting directly to Intel's CEO. IFS will be a world-class foundry business and a major US and European-based capacity provider to serve customers globally. We differentiate IFS with a combination of leading-edge packaging and process technology, committed capacity in the US and Europe, plus a world-class IP portfolio including x86 cores, graphics, media, display, AI, interconnect, fabric, and other critical foundational IP, along with Arm and RISC-V ecosystem IPs. IFS will also provide access to silicon design services to help our customers seamlessly turn silicon into solutions using industry-standard design packages. Intel dedicates IFS to the success of its customers with entire Profit and Loss responsibilities. This model will ensure that our foundry customers' products will receive our utmost focus in terms of service, technology enablement, and capacity commitments. IFS is already engaged with customers today, starting with our existing foundry offerings. We are expanding imminently to include our most advanced technologies optimized for cutting-edge performance, making them ideal for high-performance applications.



Other Locations

US, Arizona, Phoenix;US, California, Folsom;US, Oregon, Hillsboro;US, Texas, Austin


Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.



Position of Trust

This role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter....



Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.

Posted: 2022-05-15 Expires: 2022-06-15

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Principal Engineer- EDA Engineering

Intel
Santa Clara, CA 95050

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