23 days old

Principal Engineer, Pre-si Verification

Intel
Santa Clara, CA 95050
  • Job Code
    JR0193038
Job Description

The world is transforming - and so is Intel!  Here at Intel, we believe the world needs technology that can enrich the lives of every person on earth. We work every single day to design and manufacture silicon products that empower peoples digital lives. Do you love to solve technical challenges that no one has solved yet? Do you enjoy working with cross functional teams to deliver solutions for products that impact customers lives? If so, Come join us to do something wonderful! IP Engineering Group builds IPs that power Intel's leadership products and power our customer's silicon chartered with delivering IP multiple server SOCs across Intel. 

This is Principal Engineer role, which is a hands-on, highly technical individual contributor role. Your responsibilities will include but not limited to:

- Define and enhance methodologies for pre-silicon validation of high complexity IP improving the overall efficiency and velocity of the pre-silicon validation team.

- Interact closely with the architecture and design teams, influencing product definition, implementation and validation.

- Create, define and develop system validation environment and test suites

- Responsible for the development of methodologies, execution of validation test plans, test sequences and directed tests.

- Mentor and guide junior verification engineers 

The role requires the following attributes in the candidate:

- Proven track record in IP verification from environment development to tests development

- Hands-on verification experience and high-proficiency using SystemVerilog and OVM/UVM2

- Proven track record of developing complex verification collaterals quickly and solid simulation debug skills.

- In-depth understanding of computer architecture, PCI-Express or other I/O protocols, and any coherency protocols 


Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:
Candidate must have a Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field with 12+ years of experience - OR - Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field with 8+ years of experience:
As a Pre-Si Validation designer including experience in: IP verification from environment development to tests development
Hands-on verification experience using SystemVerilog and OVM/UVM2
In-depth understanding of computer architecture, PCI-Express or other I/O protocols, and any coherency protocols
C/C++ and Scripting experience

Preferred Qualifications:
x86 knowledge
Experience role modeling and mentoring junior engineers
Strong communication skills to influence partners and stakeholders
Change agent mindset

Inside this Business Group

IP Engineering Group's (IPG) vision Build IPs that power Intel's leadership products and power our customer's silicon. We want to attract & retain talent who get joy in building high quality IP and share our core belief that IP is fundamental to transforming Intel's silicon design process. IPG's guiding principles will be ensuring Quality (Zero Bugs), Customer Obsession (Delight our Customers) and structured Problem Solving. We are a fearless organization transforming IP development.



Other Locations

US, Arizona, Phoenix;US, California, Folsom;US, Massachusetts, Hudson;US, Oregon, Hillsboro;US, Texas, Austin


Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.



Position of Trust

This role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter....

Posted: 2022-04-28 Expires: 2022-05-29

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Principal Engineer, Pre-si Verification

Intel
Santa Clara, CA 95050

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