24 days old

Principal Engineer-Pre-si Verification Technical Lead

San Jose, CA 95113
  • Job Code
Job Description

PSG's Hardware Engineering organization is looking for Senior technical lead to join us to define next generation verification strategy and architecture to tackle challenges of the future in developing FPGA and Transceiver products of Programmable Solution group. This is Principal Engineer role, which is a hands-on, highly technical individual contributor role. As a technical leader on pre-si verification, candidate will drive Innovation and changes required in verification to incorporate ML/AI based strategic initiatives to improve quality and efficiency. Candidate will be the focal point across organizational partnerships in Architecture, Design, Firmware developers and Validation teams within Intel across different sites. Candidate should possess excellent written and verbal communication to communicate the technical details with the verification engineers and project status, next steps, and needs with program leads and upper management.

Your responsibilities will include but not limited to:
Define and enhance methodologies for pre-silicon validation of high complexity FPGA and Transceiver chiplets improving the overall quality, efficiency and velocity of the pre-silicon validation team.
Interact closely with the architecture and design teams, influencing product definition, implementation and verification.
Create, define and develop all levels of verification environment and test suites
Responsible for the development of methodologies, execution of verification  test plans, test sequences and directed tests.
Mentor and guide junior verification engineers

Additional Skills
Effective negotiation skills with proven skills to work between various engineering and business teams in order to deliver results.
Proven skills to lead cross-organizational teams where participants are not direct reports, motivating technical contributors and driving innovation.
Excellent written and oral presentation skills, including participating in Initiatives, task force and workgroups. Proficiency to create concise summaries of plans, status, recommendations, and risks along with the path to resolution

Strong communication skills to influence partners and stakeholders
Change agent mindset


Minimum Qualifications
BS degree in Electrical Engineering, Computer Engineering, Computer Science, or related field with 12+ years of experience - OR - Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field with 8+ years of experience:
8+ years of experience in Pre-Si functional/performance/power verification
8+ years of verification experience and high-proficiency using System Verilog and OVM/UVM

Preferred Qualifications

Domain expertise in FPGA architecture/design and verification, Functional modeling, Device protocols, Firmware verification, Formal Property verification and emulation

Experience in using emulators/FPGA to do pre-silicon validation

Experience in logic design, architecture, verification
Experience role modeling and mentoring junior engineers

Inside this Business Group

The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.

Other Locations

US, Oregon, Hillsboro

Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

This role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter....

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.

Posted: 2022-06-07 Expires: 2022-07-08

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Principal Engineer-Pre-si Verification Technical Lead

San Jose, CA 95113

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