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Job CodeJR0214380
Responsible for:
Ensuring the testability and manufacturability of integrated circuits from the component feasibility stage through production ramp.
Making significant contributions to design, development and validation of testability circuits.
Evaluating, developing and debugging of complex test methods.
Developing and debugging complex software programs to convert design validation vectors and drive complex test equipment.
Creating and testing validation and production test hardware solutions.
Testing, validating, modifying and redesigning circuits to guarantee component margin to specification.
Analyzing and evaluating component specification versus performance to ensure optimal match of component requirements with production equipment capability with specific emphasis on yield analysis and bin split capability.
Analyzing early customer returns with emphasis on driving test hole closure activities.
Creating and applying concepts for optimizing component production relative to both quality and cost constraints.
Autonomously planning and scheduling own daily tasks, developing solutions to problems utilizing formal education and judgment.
Qualifications
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Experience listed
below would be obtained through a combination of your school
work/classes/research and/or relevant previous job and/or
internship experiences.
Minimum
Qualifications:
The candidate must have a Bachelor's degree in Electrical/Computer Engineering, Computer Science or a related field.
OR
Master's/PhD degree in Electrical/Computer Engineering, Computer Science or a related field
SOC/ASIC validation and characterization - analog/mixed-signal or digital.
Design for Test, DFT principles, test methods and HVM testing.
Intel CPU/SOC or other ASIC architecture, scripting/programming and UNIX.
Preferred Qualifications:
Experience
with:
Verilog and System Verilog, RTL design and micro-architecture.
Programming language such as C/C++ Perl or Python.
Oscilloscope, BERTs and Signal Analyzer.
Analog Circuits Interfaces.
PCIe, DDR, PLL, USB3.x interfaces.
Scan and Cache (MBIST, BIST) arrays.
In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intels products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moores Law and groundbreaking innovations. DEG is Intels engineering group, supplying silicon to business units as well as other engineering teams. As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.
Intel
strongly encourages employees to be vaccinated against COVID-19.
Intel aligns to federal, state, and local laws and as a contractor
to the U.S. Government is subject to government mandates that may
be issued. Intel policies for COVID-19 including guidance about
testing and vaccination are subject to change over
time.
Posting
Statement
All qualified
applicants will receive consideration for employment without regard
to race, color, religion, religious creed, sex, national origin,
ancestry, age, physical or mental disability, medical condition,
genetic information, military and veteran status, marital status,
pregnancy, gender, gender expression, gender identity, sexual
orientation, or any other characteristic protected by local law,
regulation, or
ordinance.
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.
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