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Job CodeJR0203688
Come work with one of the largest engineering companies in the World.Intel is a global leader, creating world-changing technology that enables progress and enriches lives. We are at the intersection of several technology inflections such as artificial intelligence, 5G network transformation, and the rise of the intelligent edge, that together will shape the future of technology.The Programmable Solutions Group's Custom Logic engineering CLE team is based in San Jose, CA. The Custom logic manufacturing engineering CME department under CLE is involved in building manufacturing solutions for leadership custom logic portfolio including Fabric FPGA, transceivers.The ideal candidate will be responsible for the following activities:Will participate on developing solutions for stress content that will be used for product qualification on FPGA including content, module development, validation, debug and integrated into test program. You will interact with multidisciplinary/global teams including:Hardware engineers to define requirements and limitations of the stress pattern requirement and incorporate those in the stress patterns.Define requirements for stressing the FPGA, generate, validate and debug test content.Product owners to determine requirements for experiments dedicated to evaluate product quality and reliability including voltage and temperature acceleration as well as test flow for stress.The Product Burn-In engineer role will also include:Validation of stress content thru simulation during the pre-silicon timeframe.Working with division content writers to ensure they are creating the right stress content.Conversion of the content into target tester platform format.Support during the post-silicon bring up of the product as a content expert.Integrate the patterns into test program.
Qualifications
Minimum
qualifications:MS Degree in Electrical Engineering or equivalent.2+
years of experience in related field - Electrical Engineering,
Computer Engineering/Science and allied fields.Experience in
Programming (Python, C++ or Perl) and Intel FPGA design
software.Background on logic design, design for test, computer
architecture and digital/analog circuits is strongly
desired.Preferred Qualifications:Experience in yield analysis, test
method/program development, debugging complex test
circuits.Experience programming in HDLs - (Verilog,
VHDL).
The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.
Intel
strongly encourages employees to be vaccinated against COVID-19.
Intel aligns to federal, state, and local laws and as a contractor
to the U.S. Government is subject to government mandates that may
be issued. Intel policies for COVID-19 including guidance about
testing and vaccination are subject to change over
time.
Posting
Statement
All qualified
applicants will receive consideration for employment without regard
to race, color, religion, religious creed, sex, national origin,
ancestry, age, physical or mental disability, medical condition,
genetic information, military and veteran status, marital status,
pregnancy, gender, gender expression, gender identity, sexual
orientation, or any other characteristic protected by local law,
regulation, or ordinance.
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