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Job CodeJR0220958
EMP seeks a Foundry
Memory Device Engineer, responsibilities may include:
-
Embedded memory IP(SRAM/RF/eFlash) yield/power/performance
management for multiple products high volume
manufacturing
- Early engagement from the design phase and
New Product Integration ( NPI) is needed
- Memory device
engineering, targeting, modeling, simulation, post-silicon
correlation
- Contribute to memory IP post-Si activities
such as design debug and yield analysis to be able to root cause
both design or Si process problems that may be preventing the
design from achieving the required specs and yield
- Drive
parametric yield Pareto detractors in memory domain. Support
Continuous Improvement Plan (CIP) de-bug activities with special
focus on memory parametric and systematic yield loss
mechanisms.
- Optimize memory blocks parametric centering
for the best of high volume (HVM) production to meet Vmin, Vmax,
Speed and Power requirement
- Drive external Foundry on
memory related yield debugging and yield
improvement
A successful candidate will
demonstrate:
- Team player / facilitator. Works
collaboratively with other teams and role models
collaboration.
- Influencer. Self-aware, active listener,
and seeker of win/win solutions. Seeks to influence key thought
leaders and deciders.
- Communicator. Communicates clearly
- visual, written, and verbal - across all levels at Intel. Values
brevity and getting to the point.
- Assertive. Works
independently, develops a point of view, and advocates across
Intel. Respects people and process while advocating.
-
Curiosity. Learns fast, derives trends from data, and drives
solutions. Asks the great thought-provoking questions that drive
action.
- Passion. Person who enjoys Product Integration
Engineering, Leadership and has an established track record of
achieving excellent results through their
team.
Qualifications
Minimum
qualifications:
Bachelor's Degree in EE. CS, CE
or similar STEM
degree
4+
years of experience with the following:
- Experience in external Foundry and/or Fabless companies
- Memory yield / PPA enhancement with Foundry and partners.and/or memory IP development and/orExperience with memory device engineering
Preferred
qualifications:
- - Master's Degree in Engineering or PHD or related field.
- - Memory bitcell, array construction, and periphery circuit design
- - Memory Vmin margin analysis and design assist
- - Memory IP power performance area (PPA) optimization
- - Memory array/IP design, memory circuit innovation, testchip design/execution/validation
Intel's Sales and Marketing (SMG) organization works with global customers and partners to solve critical business problems with Intel based technology solutions. SMG works across business units to amplify the customer voice and deliver solutions that accelerate their business. We work across numerous industries, including retail, enterprise and government, cloud services and healthcare as examples. The operations team focuses on forecasting, driving alignment with factory production and delivering efficiency tools and our marketing capability drives demand and localized marketing in locations around the globe. Our sales force navigates a complex partner and customer ecosystem while shaping product roadmaps, driving value for our customers, and collaborating to harness emerging technology trends to deliver comprehensive solutions.
Other
Locations
US, Arizona,
Phoenix;US, California, Folsom;US, California, San Diego;US,
Oregon, Hillsboro;US, Texas,
Austin
Intel
strongly encourages employees to be vaccinated against COVID-19.
Intel aligns to federal, state, and local laws and as a contractor
to the U.S. Government is subject to government mandates that may
be issued. Intel policies for COVID-19 including guidance about
testing and vaccination are subject to change over
time.
Posting
Statement
All qualified
applicants will receive consideration for employment without regard
to race, color, religion, religious creed, sex, national origin,
ancestry, age, physical or mental disability, medical condition,
genetic information, military and veteran status, marital status,
pregnancy, gender, gender expression, gender identity, sexual
orientation, or any other characteristic protected by local law,
regulation, or
ordinance.
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.
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