9 days old

PROM IP Logic Design Engineer

Austin, TX 78701
  • Job Code
Job Description

About the Organization: 

You will be a part of Intels Advanced Design Organization (AD) within the Design Enablement (DE) team focused on pathfinding and development of advanced memory technology and circuits to enable best-in-class memory collateral/IP and product design across all generations of Intel process technology.  You will be involved in deep sub-micron Digital, Analog/Mixed-Signal IC design in Intel's leading process technology, creating and implementing competitive solutions with Intel's PROM circuit technology for use in mobile, IOT, client, and server segments. 


Job responsibilities include: 

  • Oversees definition, design, verification, and documentation for SoC (System on a Chip) development 
  • Determines architecture design, logic design, and system simulation 
  • Defines module interfaces/formats for simulation 
  • Performs Logic design for integration of cell libraries, functional units and subsystems into SoC full chip designs, Register Transfer Level coding, and simulation for SoCs 
  • Contributes to the development of multidimensional designs involving the layout of complex integrated circuits 
  • Performs all aspects of the SoC design flow from high level design to synthesis, including contributing to physical design in the areas of place and route, timing and power to create a design database that is ready for manufacturing 
  • Analyzes equipment to establish operation infrastructure, conducts experimental tests, and evaluates results 
  • May also review vendor capability to support development 


You must possess the below requirements to be initially considered for this position. Preferred qualifications are in addition to the requirements and are considered a plus factor in identifying top candidates.

Minimum Requirements: 

MS in Electrical Engineering or related field with 3+ years of professional experience in Logic design and pre-Si verification using SystemVerilog in a UVM environment, including but not limited to the following: 

  • Micro-architecture definition of design features and functional verification. 
  • UPF (Unified Power Format) creation using VCLP and low power techniques  
  • Verification of behavioral models through industry standard tools such as Spyglass  
  • Clock-domain-crossing (CDC) or Reset-domain-crossing (RDC) verification expertise 


Preferred Requirements: 

  • Knowledge of behavioral modeling using Verilog and SystemVerilog coding 
  • Knowledge of deep sub-micron IC design 
  • Experience in scripting languages (Perl, TCL, etc.) to enhance automation in design, verification and testing 
  • Effective behavioral modeling and testing of Digital, Analog and Mixed-signal circuits in Verilog and SystemVerilog, as well as logical equivalence verification between schematic and Verilog models. 
  • JTAG and other industry-standard protocols, state machines, memory logic design and verification

Inside this Business Group

As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support.  Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moores Law to bring smart, connected devices to every person on Earth.

Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.

Posted: 2022-05-14 Expires: 2022-06-14

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PROM IP Logic Design Engineer

Austin, TX 78701

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