Intel Ethernet Products Group (EPG) delivers best-in-class Ethernet products and is part of the Connectivity Group which is at the heart of Intel's transformation from a PC company to a company that powers the cloud and billions of smart, connected computing-devices. EPGs compelling Ethernet products move the worlds data and are the foundations of cloud service and telecommunications data centers. We are a team of problem solvers, experimenters, and innovators who are dedicated to designing the network technologies that currently lead and continue to transform datacenter ecosystems. As a world-class organization, were looking for outstanding talent to accelerate our growth during an exciting time in Ethernet networking marketing technology. If you're ready to be a part of this journey, then we want to hear from you. 

We are looking for a micro architect with experience in RDMA technologies or a micro architect with any large-scale datacenter fabric experience for its next-generation Smart NIC product lines. Join our micro architecture team where you will determine, specify, and evaluate the viability of complex hardware features and structures and ensure that software and hardware designs interface correctly. In this role you will influence the shaping of future products by significantly contributing to the micro architecture used across design families as well as providing multilayered technical expertise for next generation initiatives. The chosen candidate will have strong focus on efficient hardware design with broad SoC knowledge to tune hardware and software to achieve scalable and robust solutions. You will be capable of providing guidance for silicon design engineering as well as interfacing with software teams and customers.

As a RDMA Micro Architect, your responsibilities will include:

• Consulting with the architecture modeling team to create performance-based models
• Specify, document, and help model the micro architecture interfaces, flow diagrams and timing waveforms that map product requirements into implementation blocks considering both legacy hardware and software re-use possibilities
• Identify, analyze, and resolve subsystem and SoC design weaknesses with consideration of verification, timing, area, and power complexities

Qualifications

Minimum Qualifications

• Bachelor's degree in Electrical or Computer Engineering, Computer Science, Math, Physics, or related field
• 4+ years of industry work experience
• Expertise in networking protocols
• Expertise in high-speed ASIC design and debug (Verilog, fsdb)

Preferred Qualifications:

• Post Graduate degree
• Expertise in networking protocols (ex. InfiniBand, TCP/IP, RDMA or RoCE)
• Expertise in cloud usages for RDMA such as NVME
• Expertise in HPC usages for RDMA such as HPC and AI/ML
• Expertise in System C or C++ or scripting

The Network & Edge Group brings together our network connectivity and edge into a business unit chartered to drive technology end to end product leadership. It's leadership Ethernet, Switch, IPU, Photonics, Network and Edge portfolio is comprised of leadership products critically important to our customers.

Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.