18 days old

RTL Logic Design Engineer

Intel
Austin, TX 78701
  • Job Code
    JR0216627
Job Description

Intel Ethernet Products Group (EPG) delivers best-in-class Ethernet products and is part of the Connectivity Group which is at the heart of Intel's transformation from a PC company to a company that powers the cloud and billions of smart, connected computing-devices. EPGs compelling Ethernet products move the worlds data and are the foundations of cloud service and telecommunications data centers. We are a team of problem solvers, experimenters, and innovators who are dedicated to designing the network technologies that currently lead and continue to transform datacenter ecosystems. As a world-class organization, were looking for outstanding talent to accelerate our growth during an exciting time in Ethernet networking marketing technology. If you're ready to be a part of this journey, then we want to hear from you. 


This position is targeted towards Remote Direct Memory Access or RDMA Technology. The RDMA team is a creative team of engineers dedicated to designing the hardware technologies that network the leading cloud-service and telecommunication datacenters. We are looking for motivated and astute individuals to join our close-knit team responsible for creating RTL designs for a high-performance RDMA accelerator IP.

Responsibilities will include, but are not limited to:

  • Developing designs to be used across our product roadmaps.
  • Working with an international team of experts in IP development.
  • Responsibility for the entire front end design with consideration of verification, timing, area, and power complexities.
  • Finding and implementing corrective measures for failing RTL tests and applying all quallity checks.

The chosen candidate will have strong focus on efficient hardware design with broad SoC knowledge to tune hardware and software to achieve scalable and robust solutions. You will be capable of providing guidance to junior engineers and assist our firmware team, verification team, emulation team, software team and customers.

 


Qualifications

Minimum Qualifications:

  • Bachelor's degree in Electrical or Computer Engineering, Computer Science, Math, Physics, or related field of study.
  • 6 plus years of experience in a relevant RTL design position, having gone through multiple project cycles to gather in-depth experience.
  • Experience with complex state machine and pipelined logic designs implemented in SystemVerilog.
  • Experience in debugging RTL test cases or firmware in a SystemVerilog simulation environment.


Preferred Qualifications:

  • Postgraduate degree in Electrical or Computer Engineering, Computer Science, Math, Physics, or related field of study
  • Experience in networking protocols (InfiniBand, TCP/IP, RDMA or RoCE).
  • Experience in high-speed ASIC or SOC design and debug (Verilog, fsdb).
  • Experience in post-silicon debug
  • Experience in SOC emulation.

Inside this Business Group

The Network & Edge Group brings together our network connectivity and edge into a business unit chartered to drive technology end to end product leadership. It's leadership Ethernet, Switch, IPU, Photonics, Network and Edge portfolio is comprised of leadership products critically important to our customers.



Other Locations

US, California, San Jose


Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.



Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.

Posted: 2022-05-07 Expires: 2022-06-07

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RTL Logic Design Engineer

Intel
Austin, TX 78701

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