12 days old

RTL/Logic Design Engineer

Santa Clara, CA 95050
  • Job Code
Job Description

About IFS:

As an integral part of Intel, we are establishing Intel Foundry Services (IFS), a fully vertical, standalone foundry business. IFS will be a world-class foundry business and major provider of US and European-based capacity to serve customers globally.

Intel Foundry Services will be differentiated from other Foundry offerings with a combination of leading-edge packaging and process technology, committed capacity in the US and Europe - available for customers globally - and a world-class IP portfolio that customers can chose from including x86 cores, graphics, media, display, AI, interconnect, fabric and other critical foundational IP, along with ARM and RISC-V ecosystem IPs. IFS will also provide access to silicon design services to help our customers seamlessly turn silicon into solutions, using industry standard design packages.

This business unit is completely dedicated to the success of its customers with full P and L responsibilities. This model will ensure that our foundry customers' products will receive our utmost focus in terms of service, technology enablement and capacity commitments. IFS is already engaged with customers today starting with our existing foundry offerings and we are expanding imminently to include our most advanced technologies, which are optimized for cutting-edge performance, making them ideal for high-performance applications.

Role and Responsibilities:

In this role, you will be part of a world-class Silicon design team of highly talented engineers working on cutting-edge IP/SoC architectures, advanced Silicon design and process technologies.

In this role, the responsibilities may include but are not limited to:

  • Convert Architecture specification to Micro-architecture specification, implement logic functions in RTL using Verilog/System Verilog.

  • Test design using formal verification tools and functional verification environment.

  • Qualify design to meet power, performance requirements using power simulation and static timing tools.

  • Work with Pre/Post-silicon verification teams to debug and root-cause RTL simulation/Silicon/FPGA failures.

  • Provide support to SOC customers for IP integration, debug support and timing convergence.

  • Write scripts to automate design tool flows as required to improve efficiency.


Come and join us! Intel is seeking highly qualified candidates to join our Intel Foundry Services as an logic Engineer and work on one of the Several High Speed PHY/Clocking/PLLs with some of the most advanced CMOS processes in the world.!

Responsibilities will include, but are not limited to:

  • Oversee definition, design, and documentation of IP features development

  • Experience with multi voltage domain & power gating design process {upf coding}

  • Create microarchitecture specifications from High level Architecture specification to describe logic function

  • Code Verilog designs to match the specification

  • Utilize front end design tools such as CDC and Lint in order to ensure high quality designs

  • Knowledge to Analyze Primetime Report and improve the design as needed.

  • Code Coverage Analysis and defining scenarios to improve the code coverage from verification.

The ideal candidate will have the following skills in addition to the qualifications listed below.

  • Team player, with a demonstrated experience technically influencing others.

  • Strong problem-solving skills.

  • Excellent verbal and written communication skills.

  • Motivation for continuous skill-development in high-speed/Analog/Mixed signal design

In this position you will gain invaluable experience that will allow growth and expanded opportunities across Intel.

You must possess the below minimum education requirements and minimum required qualifications to be initially considered for this position. Additional preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Education Requirement:

  • Bachelor's degree in Electrical or Electronics Engineering or related field plus 3 years of industry work experience, or

  • Master's degree in Electrical or Electronics Engineering or related field plus 2 years of industry work experience, or

  • PhD in Electrical or Electronics Engineering or related field plus 1 years of related work experience.

Minimum Required Qualifications:

  • 3 plus years of experience in high speed IO Logic Design { Example: PCie, USB TypeC, HDMi, eDP, Display port, MIPI CPHY/DPHY, Ethernet PHY}

  • IP or SoC development using Verilog/SystemVerilog in Open Verification Methodology (OVM)/Universal Verification Methodology (UVM)

  • Writing System Verilog Assertions (SVA)

  • Interpreting code coverage results to augment better design verification outcomes

Additional Preferred Qualifications:

  • Experience with GateKeeper utilities is a plus

  • Experience with PT ECO scripting is a  plus.

  • Experience with Perl/TCL scripting is a plus.

Inside this Business Group

As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support.  Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moores Law to bring smart, connected devices to every person on Earth.

Other Locations

US, Arizona, Phoenix;US, California, Folsom

Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Posted: 2022-05-15 Expires: 2022-06-15

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RTL/Logic Design Engineer

Santa Clara, CA 95050

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