13 days old

Senior Analog Mixed Signal Design Engineer

Folsom, CA 95630
  • Job Code
Job Description

If you are passionate about computer graphics and working with leading graphics and related analog-mixed-signal experts on the latest technologies, then Intels Custom Compute group has an opportunity for you.  In this group we focus on building custom SOC, Package and System products and we are looking for  Sr. Senior Analog Mixed Signal Design Engineers to join the team. 

In this role you will work on High speed IO PHY and DAC/ADC Analog Designs within Graphics, High performance Computing and Custom Compute organization to lead high speed, high Bandwidth IO interfaces and/or ADC/DACs for custom interfaces involving optics and involve delivering all aspect of designs from definition to PRQ. The candidate should be able to come up with creative analog design approaches for developing best-in-class KPI's involving leading edge process nodes.


Responsibilities will include, but are not limited to:

  • Developing and exploring PHY architecture specifications and engage in specs/protocol definition of interface
  • Defining and documenting functional requirements of PHY/Analog blocks and functional interfaces to SoC and Controller
  • Design of complex analog blocks like CTLE, DFE, DLL, Phas-interpolators
  • Define IO PHY floor-plan and the floor-plans of complex analog blocks
  • Closely guide analog layout/physical designers to ensure that the layout meets post-layout performance/functional specs
  • Collaborating with PHY architects, mirco-architects, physical design, packaging, signal integrity, platform and performance validation team, and 3rd party IP vendors


The ideal candidate will have the following skills in addition to the qualifications listed below:

  • Strong analog design background in High speed SERDES and parallel IO PHY's and/or strong design background involving precision ADC/DACs
  • Well versed in Analog and Custom design related design tools and flows used to verify quality, reliability of the designs
  • Experience with digital control loops used with analog circuits and modelling system behavior in MATLAB/SIMULINK is a plus
  • Have a good balance of standard IO interfaces PHY architecture experience and strong analog-mixed-signal design fundamentals and mixed-signal verification skills
  • Must be a team player, with a demonstrated experience technically influencing others
  • Strong analog design related problem-solving skills
  • Excellent verbal and written communication skills


Minimum skills and experience:

Must have a Bachelor's degree in Electrical/Computer Engineering or related field with  5+ years of industry work experience. Or a Master's degree in the same fields with  3+ years of industry work experience, or a PhD in the same fields with 1 years of industry experience.


Your experience should be in the following;

  • High speed SERDES PHY related analog design
  • High frequency LC/Ring DCO designs, DLL designs
  • Analog Mixed signal design related to high speed parallel-IOs

Preferred skills and experience:

  • CMOS analog design and Process implication to Analog/PHY blocks
  • Standard interfaces for High speed serial and parallel IO PHYs and NRZ/PAM-4 signaling and/or
  • Precision ADC/DACs circuits

Inside this Business Group

The focus of Accelerated Computing Systems and Graphics (AXG) is to accelerate our execution in strategic growth areas of high-performance computing and graphics. AXG is chartered with delivering high performance computing and graphics solutions (IP, Software, Systems), for both integrated and discrete segments across client, enterprise and data center.  Our mission is to make zeta-scale computing accessible to every human on the planet by the end of this decade and to entertain, educate and connect billions of people with buttery smooth visual experiences.

Other Locations

US, Oregon, Hillsboro;US, Texas, Austin

Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Posted: 2022-05-14 Expires: 2022-06-14

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Senior Analog Mixed Signal Design Engineer

Folsom, CA 95630

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