External Manufacturing Production (EMP) team is chartered with High Volume Manufacturing (HVM) of Intel products with our 3rd party Foundry and OSAT suppliers as per Intel IDM2.0 Vision.

EMP Manufacturing Quality Enhancement elite DFX team seeks Staff FE/DFX Implementation engineers to support its operations.

This is a highly strategic and visible position that present significant personal growth possibilities due to the intrinsic exposure to the entire semiconductor product development cycle from product definition to HVM.

A unique opportunity of dealing with all different aspects of the most advanced and cutting-edge design, production and technology processes and interacting with the respective stakeholders within the whole company and suppliers' eco-system.

Job responsibilities include but not limited:

• Engage with multiple Intel SOC/IP design teams and BU's starting from architecture definition phase and drive specific EMP DFM/DFT/DFD centric aggregated power, performance, timing and margin requirements
• Define, Monitor and Review products Implementation quality metrics (timing figures, signal integrity and IR drop margins) throughout development and ramp to production
• Support Yield, Test, Assembly, Packaging , Process and Foundry teams in post NPI HVM yield control and improvement
• Lead in reducing design marginalities and enlarging process windows (sweet spotting)

A successful candidate must demonstrate:

• Knowledge of OCV, IR-drop, Xtalk, Jitter concepts
• Team player, good inter-people relationship, and self-motivated.

Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. This Position not eligible for Intel immigration sponsorship.

Minimum qualifications:

Bachelors degree with 4+ years of experience OR Masters degree with 3+ years of experience OR PhD with 2+ years of experience

Preferred qualifications:

Basic understanding of:

• Experience with SOC Implementation tools, flows and processes
• Experience with Synthesis, Formal verification and ECO tools and flows
• Experience with Synthesis and STA constraints generation and verification tools and flows
• Experience with Static Timing, Signal Integrity and Power analysis across PVT
• SOC architecture, tile/chiplet based integration, clock and power architectures
• Library modeling and characterization
• BE Implementation (PNR, IR analysis) concepts
• DFT/design architectural concepts (scan, mbist, power, clock)

Intel's Sales and Marketing (SMG) organization works with global customers and partners to solve critical business problems with Intel based technology solutions. SMG works across business units to amplify the customer voice and deliver solutions that accelerate their business. We work across numerous industries, including retail, enterprise and government, cloud services and healthcare as examples. The operations team focuses on forecasting, driving alignment with factory production and delivering efficiency tools and our marketing capability drives demand and localized marketing in locations around the globe. Our sales force navigates a complex partner and customer ecosystem while shaping product roadmaps, driving value for our customers, and collaborating to harness emerging technology trends to deliver comprehensive solutions.

Other Locations

US, California, Santa Clara;US, Oregon, Hillsboro

Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.