4 days old

Senior IP Logic Design Engineer

Intel
Folsom, CA 95630
  • Job Code
    JR0222451
Job Description

Come and join us. Intel Foundational Security Team is looking for highly-qualified candidates to join our IP development team. Security is a key pillar of Intel's vision and commitment to customers. Do you want to be part of a team developing security hardware for Intel products? If so, this is the team for you.

IP Logic Designers play a critical role in our IP development team. They engage with architects to learn and understand the intended hardware functionality, and then develop micro-architecture specifications, and write efficient and elegant RTL to implement features. Our engineers are involved through the full product development cycle from new feature concept, feasibility assessment and planning, and execution.

Quality is a core value at Intel, and Logic Design engineers play an important role in ensuring quality in our designs, working as a team with the architecture, pre-silicon verification, and emulation and post-Silicon debug teams as needed.

Success is defined by on time delivery of new innovative features with zero bugs found by downstream customers of our IP design which is a significant challenge, and the opportunities to learn are large. We strive to create a safe and diverse environment where learning is valued and technical and personal growth is encouraged and supported.

The ideal candidate will have the following skills in addition to the qualifications listed below.
Thoughtful and perceptive analytical skills.
A genuine curiosity for understanding the system.
Dedicated and committed to creative problem solving and getting things done.
Willing and able to work with cross-functional teams.
A positive growth mindset, and desire to learn.


The Foundational Security Team develops new technologies to ensure security of Intel products. The group is a world-wide organization delivering security solutions to the mainstream Intel product roadmap.


Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Required Qualifications:
� Master's degree in Electrical or Computer Engineering, Computer Science, or related field.
� 4 plus years of experience in System Verilog based logic design

Additional Preferred Qualifications:
� Strong understanding of logic design principles and practices
� Familiarity with industry standard methodologies like CDC and UPF
� Understanding of security countermeasures to physical attacks
� Experience with supporting post-silicon bring up and debug.

Inside this Business Group

In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intels products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moores Law and groundbreaking innovations.  DEG is Intels engineering group, supplying silicon to business units as well as other engineering teams.  As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.



Other Locations

US, California, Santa Clara


Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.



Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.

Posted: 2022-08-11 Expires: 2022-09-11

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Senior IP Logic Design Engineer

Intel
Folsom, CA 95630

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