13 days old

Senior IP Logic Design Engineer

Intel
Hillsboro, OR 97123
  • Job Code
    JR0189676
Job Description

The world is transforming and so is Intel!  Here at Intel, we believe the world needs technology that can enrich the lives of every person on earth. We work every single day to design and manufacture silicon products that empower peoples digital lives. Do you love to solve technical challenges that no one has solved yet? Do you enjoy working with cross functional teams to deliver solutions for products that impact customers lives? If so, Come join us to do something wonderful!

Join our team to work on IP designs which are included in Intel's newest server CPUs.
IP Logic Designers plays a critical role in our IP development team. They engage with architects to learn and understand the intended hardware functionality, and then develop micro-architecture specifications, and write efficient and elegant RTL to implement features. Our engineers are involved through the full product development cycle from new feature concept, feasibility assessment and planning, and execution.

Quality is a core value at Intel, and Logic Design engineers play an important role in ensuring quality in our designs, working as a team with the architecture, pre-silicon verification, and emulation and post-Silicon debug teams as needed.

Success is defined by:

  • On time delivery of new innovative features with zero bugs found by downstream customers of our IP design which is a significant challenge, and the opportunities to learn are large.

We strive to create a safe and diverse environment where learning is valued and technical and personal growth is encouraged and supported


Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:

Candidate must have a Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field with 3+ years of experience - OR - Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field with 2+ years of experience in:

  • Front-end RTL design
  • Standard-cell based VLSI design methodology and relevant EDA tools
  • System Verilog RTL coding and RTL Simulator (IE VCS) experience
  • Scripting with Unix shell, Python, Perl and/or Tcl.
  • Design for testability (DFT, DFX), Lint, Synthesis, timing closure
  • RTL synthesis, and RTL design for timing closure


Preferred Qualifications:
Mixed Signal Design.
Multi-clock domains and multi-power domain designs.
Coverage-driven functional verification, test plan development and test plan execution

Inside this Business Group

IP Engineering Group's (IPG) vision Build IPs that power Intel's leadership products and power our customer's silicon. We want to attract & retain talent who get joy in building high quality IP and share our core belief that IP is fundamental to transforming Intel's silicon design process. IPG's guiding principles will be ensuring Quality (Zero Bugs), Customer Obsession (Delight our Customers) and structured Problem Solving. We are a fearless organization transforming IP development.



Other Locations

US, Arizona, Phoenix;US, California, Santa Clara


Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Posted: 2022-05-14 Expires: 2022-06-14

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Senior IP Logic Design Engineer

Intel
Hillsboro, OR 97123

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