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Job CodeJR0213444
Responsibilities will be but not limited to:
Development and creation of exceptional quality custom and semi-custom analog, mixed signal or digital layout
Layout floor-planning, power plan, routing plan, hierarchical layout assembly, custom cell design, optimized cell sharing, and final layout generation
Apply experience in layout to appropriately address ANT, ESD, LU, EM, reliability and thermal effects
Provide and maintain reliable layout schedules
Ability to lead a design: delegate daily tasks, provide technical guidance and review layout quality
The ideal candidate should exhibit the following behavioral traits:
Highly motivated individual willing to work under pressure and deliver high quality results on time
Problem-solving and analytical skills
Effective prioritization and time management skills
Stakeholder management, strong collaboration, tolerance for ambiguity and critical thinking
Excellent teamwork ethics
Willing to work in an agile work environment with a fast-paced task flow
Good interpersonal skills
Qualifications
Candidate must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your schoolwork, classes, research and/or relevant previous job and/or internship experiences.
Minimum Qualifications:
Candidate
must have a Bachelor's degree in science, engineering,
computer or related
field.
7+ years of experience in
Analog, mixed signal and digital custom layout
Layout design and verification tools
5 + years of experience in:
Layout with advanced technology nodes, 20nm and below finFet technologies
Preferred
Qualifications:
Experience in:
Custom layout (10+ years)
Analog layout skills, including understanding of basic analog structures, layout skills in matching, multiple power domain, high current, high voltage and high speed designs
Floorplan, power plan, routing plan of complex analog, mixed signal and custom digital layout
Providing and maintaining layout schedules
Leading a designing: delegate daily tasks, provide technical guidance and review layout quality
Virtuoso tool usage
Unix
Basic experience in programming
The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.
Intel
strongly encourages employees to be vaccinated against COVID-19.
Intel aligns to federal, state, and local laws and as a contractor
to the U.S. Government is subject to government mandates that may
be issued. Intel policies for COVID-19 including guidance about
testing and vaccination are subject to change over
time.
Posting
Statement
All qualified
applicants will receive consideration for employment without regard
to race, color, religion, religious creed, sex, national origin,
ancestry, age, physical or mental disability, medical condition,
genetic information, military and veteran status, marital status,
pregnancy, gender, gender expression, gender identity, sexual
orientation, or any other characteristic protected by local law,
regulation, or
ordinance.
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.
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