25 days old

Senior Member of Technical Staff- SOC Verification Engineer

Intel
San Jose, CA 95113
  • Job Code
    JR0212459
Job Description

Intel is a global leader, creating world-changing technology that enables progress and enriches lives. We are at the intersection of several technology inflections artificial intelligence, 5G network transformation and the rise of the intelligent edge- that together will shape the future of technology. We are a global leader, creating world-changing technology that enables progress and enriches lives. Intel is at the intersection of several technology inflections - artificial intelligence, 5G network transformation, and the rise of the intelligent edge- that together will shape the future of technology. As a member of Intel's Programmable Solutions Group (PSG), you will use your knowledge of Logic Design, Verification and FPGA technology to lead pre-silicon verification efforts (including IP, integration, and full-chip aspects), both internal and external, to use the Structured ASIC technology.

 

The position requires a self-driven candidate with deep knowledge in design, verification, and communication interfaces, coupled with good communication skills. Structured ASIC team: This is a structured ASIC team under Intel's PSG is targeting 5G, cloud computing and high-end consumer application space. Intel eASIC devices are structured ASICs, an intermediary technology between FPGAs and standard-cell ASICs bridging the gap between FPGA and Custom ASIC.

 

Responsibilities to include but not limited to:

  • Own verification of IP integration and/or SoC level flows.

  • Expert on the overall architecture, implementation of complex features, flows, protocols, interact with SoC and the platform.

  • Develop verification strategy, requirements, environments, tools, and methodologies.

  • Knowledge of verification principles, techniques, and to write test plans

  • Developing tests, test generators, test benches, checkers, coverage, and other verification collateral run tests

  • Debug failures to root cause

  • Collaborate with cross-functional folks to drive continuous improvement

 


Qualifications

Minimum Education Requirements
Bachelors' degree in Electrical Engineering, Electrical Electronics or Computer Engineering with 10 plus years of experience or Masters' degree in Electrical Engineering, Electrical Electronics or Computer Engineering with 7 plus years of experience.

Minimum Qualifications

  • Experience in pre-si verification of ASICs including high speed IO and SERDES

  • Experience in FPGAs or ASICs, SERDES and networking applications

  • Experience in test plan definition and testcase development in C/Assembly/System Verilog

  • Experience in verifying design at RTL level and gate-level simulation

  • Experience with scripting languages (e.g., Perl, Python, Shell)

Preferred Qualifications

  • Experience in coverage analysis, performance verification and use-case verification

  • Experience in functional test vector development and post-silicon bring-up/debug

  • Experience in analog and digital design

Inside this Business Group

The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.



Other Locations

US, California, Folsom;US, California, San Diego;US, Texas, Austin;Virtual US and Canada


Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Annual Salary Range for jobs which could be performed in US, Colorado:
$148,930.00-$238,410.00


Benefits:
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, and benefit programs. Find more information about our Amazing Benefits here

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.


Intel is committed to a culture of accessibility.  Intel provides accommodations to applicants and employees with disabilities.  Find information and request accommodation here

Posted: 2022-04-26 Expires: 2022-05-27

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Senior Member of Technical Staff- SOC Verification Engineer

Intel
San Jose, CA 95113

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