7 days old

Senior Physical Design Engineer

Intel
Santa Clara, CA 95050
  • Job Code
    JR0201587
Job Description

The world is transformingand so is Intel!  Here at Intel, we believe the world needs technology that can enrich the lives of every person on earth. We work every single day to design and manufacture silicon products that empower peoples digital lives. Do you love to solve technical challenges that no one has solved yet? Do you enjoy working with cross functional teams to deliver solutions for products that impact customers lives? If so, Come join us to do something wonderful!

Your responsibilities will include, but not limited to:

  • Own (define, maintain, and update) the generation and validation flows for standard cell physical design collaterals: NDM, LEF, Milkyway, OASIS, OALIB, etc.

  • Understand layout design rules.

  • Understand the standard cell layout specs and architecture.

  • Work with customers on physical design collateral enhancements/optimizations for route capability across SNPS and CDNS APR tools.

  • Perform technology runset evaluations and compile change list (aka XOR) data.

  • Understand and validate PDK collaterals.

  • Understand layout and block level requirements.

What we offer:  

We give you opportunities to transform technology and create a better future, by delivering products that touch the lives of every person on earth.  

As a global leader in innovation and new technology, we foster a collaborative, supportive, and exciting environment where the brightest minds in the world come together to achieve exceptional results.  

We offer a competitive salary and financial benefits such as bonuses, life and disability insurance, opportunities to buy Intel stock at a discounted rate, and Intel stock awards (eligibility at the discretion of Intel Corporation).  

We provide benefits that promote a healthy, enjoyable life: excellent medical plans, wellness programs, and amenities, time off, recreational activities, discounts on various products and services, and much more creative perks that make Intel a Great Place to Work!  

We're constantly working on making a more connected and intelligent future, and we need your help. Change tomorrow. Start today.

 


Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:

Candidate must have a Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field with 3+ years of experience.

OR

Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field with 2+ years of experience with:

  • Physical Design and TCL.


Preferred Qualifications:

  • Perl, Unix Shell Scripting.

Inside this Business Group

IP Engineering Group's (IPG) vision Build IPs that power Intel's leadership products and power our customer's silicon. We want to attract & retain talent who get joy in building high quality IP and share our core belief that IP is fundamental to transforming Intel's silicon design process. IPG's guiding principles will be ensuring Quality (Zero Bugs), Customer Obsession (Delight our Customers) and structured Problem Solving. We are a fearless organization transforming IP development.



Other Locations

US, California, Folsom;US, Texas, Austin


Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Posted: 2022-05-08 Expires: 2022-06-08

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Senior Physical Design Engineer

Intel
Santa Clara, CA 95050

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