Join Intel and engineer the future.
Intel is in the midst of an exciting transformation, with a vision to create and extend computing technology to connect and enrich the lives of every person on Earth. So join us-and help us create the next generation of technologies that will shape the future for decades to come.

Intel IP Engineering Group invites you to be part of a senior team dedicated to providing cutting edge backend design tools, flows and methodology for ground-breaking high-performance IPs. This is a unique chance to join an experienced team, as we continue transforming ourselves into the IP supplier of choice for flagship Intel SoCs. Current efforts include design innovations to achieve best in class performance across a broad scope of IPs and process technologies, as well as defining and driving tools and methodology advancement across the IP execution teams.

What you'll do:
As senior Technical Lead , your responsibilities will include, but not be limited to:

• Drive the Development, Deployment and Support design and verification tools for IPG Physical and Structural Design Engineers covering various areas such as: Design Infrastructure/Environment, Logic Synthesis and Auto-Place and Route, Performance Verification, Extraction, Collateral Packaging and Release and others across multiple technology nodes (both Internal/External).

• Work closely with IP design teams to lead evaluations, benchmarking and testing of new tools for identifying efficiency improvements.

• Partner with Tool Vendors closely to coordinate releases, debug complex issues and identifying and communicate unique IPG design team needs or gaps with the current tools.

• In addition to supporting Tool flows, you will be key in driving the creation of content for documentation, BKM's sharing, and training to IPG design engineers to enable best-in-class Design Tool capabilities for IPG.

Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:
The candidate must have a Bachelor's degree in Electrical/Computer Engineering or other related field of study and 15+ years of experience in:

• Working with large teams to provide solutions for all stages of Physical Design automation and flows.

• Solid understanding of Physical Design and verification TFM.

• Experience in using or supporting Static Timing Analysis Flows and Tools such as Primetime, or Industry standard Synthesis and Place and Route tools such as Synopsys Design/Fusion Compiler.

• Scripting languages such as Perl, Python, TCL, etc.

• Excellent problem solving as well as solid communication and written skills.

Preferred Qualifications:

• Managing teams and driving them to create improvements and enhancements.

• Project management and leadership skills.

• Experience in utilizing or supporting all stages of design implementation.

• Experience with External process nodes.

In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intels products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moores Law and groundbreaking innovations.  DEG is Intels engineering group, supplying silicon to business units as well as other engineering teams.  As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.

Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.