25 days old

Server SOC Front End Design Automation Engineer

Intel
Santa Clara, CA 95050
  • Job Code
    JR0214495
Job Description

Responsibilities:

  • Oversees definition, design, verification, and documentation for SoC (System on a Chip) development.
  • Determines architecture design, logic design, and system simulation.
  • Defines module interfaces/formats for simulation.
  • Performs Logic design for integration of cell libraries, functional units and subsystems into SoC full chip designs, Register Transfer Level coding, and simulation for SoCs.
  • Contributes to the development of multidimensional designs involving the layout of complex integrated circuits.
  • Performs all aspects of the SoC design flow from high-level design to synthesis, place and route, timing and power to create a design database that is ready for manufacturing.
  • Analyzes equipment to establish operation infrastructure, conducts experimental tests, and evaluates results.
  • May also review vendor capability to support development.


Qualifications

You must possess the below minimum qualifications to be initially considered for this position

Minimum Qualifications

Candidate must have a Masters degree in Electrical/Computer Engineering or Computer Science and 1+ years of experience in:

  • IT-Computing and shell scripting
  • EDA vendor tools from Synopsys Cadence Mentor


 

Inside this Business Group

Xeon and Networking Engineering (XNE) focuses on the development and integration of XEON and Networking SOC's and critical IP's sustain Intels Xeon and 5G networking roadmap.


Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.



Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.

Posted: 2022-05-02 Expires: 2022-06-02

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Server SOC Front End Design Automation Engineer

Intel
Santa Clara, CA 95050

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