13 days old

SoC Design Automation and TFM Engineer

Intel
Phoenix, AZ 85003
  • Job Code
    JR0210135
Job Description

Custom ASIC Solutions is part of Custom Logic Engineering within Data Center and Artificial Intelligence DCAI BU, chartered to provide ASIC SD solutions to Datacenter, 5G external customers, Intel Xeon product teams and Intel Foundry Services in leading edge technologies such in Intel i4, i3, i20A process nodes, and TSMC 5nm, 3nm etc.

We are looking for SoC Design Engineer. In this position, you will be working alongside a World class SOC design team within CAS and will be responsible for ASIC Design Development taking the existing RTL for multiple blocks and subsystems to complete design closure for tapeout.

Your responsibilities will include but not be limited to:


-Drive technical activities of physical design during all phases of Design System development and Execution. Drive performance optimization including co-optimization work with process teams to create Best in Class Design System.
- Static Timing Analysis (STA) (Block and full chip)
-SoC Design Integration Methodology.
-Effectively communicate with large numbers of design engineers providing high quality documentation and presentations.
-Auto Place-and-Route (APR) Physical Implementation using Synopsys and/or Cadence Tools.


Qualifications

You must possess the minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Relevant experience can be obtained through schoolwork classes and project work, internships, military training, and/or work experience.

Required Education:

- Bachelor's degree in Electrical or Computer Engineering, Computer Science, Math, Physics, or related field plus 6 years of industry work experience, or,

- Master's degree in Electrical or Computer Engineering, Computer Science, Math, Physics, or related field plus 4 years of industry work experience, or,

- PhD in Electrical or Computer Engineering, Computer Science, Math, Physics, or related field plus 2 years of related work experience.


Minimum Qualifications:
6+ years of experience in the application of methodologies and physical design and automation for SOC, Static Timing Analysis and APR, Floor planning and routing, physical design convergence, and tape in.

Preferred Qualifications:

-Multiple Power Domain analysis using UPF/CPF.
-VLSI Design Automation / Data Structures and Algorithms.
-Scripting skills using Python/Perl/TCL.

Inside this Business Group

The Data Center & Artificial Intelligence Group (DCAI) is at the heart of Intels transformation from a PC company to a company that runs the cloud and billions of smart, connected computing devices. The data center is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologiesspanning software, processors, storage, I/O, and networking solutionsthat fuel cloud, communications, enterprise, and government data centers around the world.



Other Locations

US, California, Santa Clara;US, Oregon, Hillsboro;US, Texas, Austin


Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.



Work Model for this Role

This role is available as fully home-based and generally would require you to attend Intel sites only occasionally based on business need.

Posted: 2022-05-11 Expires: 2022-06-11

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SoC Design Automation and TFM Engineer

Intel
Phoenix, AZ 85003

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