9 days old

SoC Design Engineer

Intel
Allentown, PA 18101
  • Job Code
    JR0219344
Job Description

Oversees definition, design, verification, and documentation for Complex IP used in SoC (System on a Chip) development. Come join a creative team of engineers dedicated to designing the hardware technologies that network the leading 5G Products. We are looking for a motivated and astute individual to join our team as an SoC Design Engineer in the Complex IP team within the Xeon and Networking Engineering Group. In this position you will be joining a diverse team responsible for Creating, defining and developing validation environment and test suites for building the networking products. This organization will be responsible for all aspects of High Speed SerDes DDR/PLL validation.

In this role, you will actively work with IP design team and participate in bring-up of embedded circuits; collaborating with many disciplines to enable the Intel Xeon and Networking products. You will closely work with a talented group of engineers working diligently to deliver Complex IPs and integrate it successfully to the final product while exceeding the highest expectations of quality, innovation and efficiency. You will use your knowledge of test development methodologies, execution of validation plans, and hands-on debug failures primarily for DDR.

Responsibilities will include, but are not limited to:

  • Developing conformance test plans for DDR.

  • Debugging to improve DDR.

  • Identify and develop characterization test plan for device speed critical paths.

  • Interface with Architecture, Design, and Pre-silicon Validation teams in improving Post-silicon test content.

  • Providing feedback for future on die debug features.


Qualifications

Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Education Requirement:

  • Bachelor's degree in Electrical or Computer Engineering, Computer Science, Math, Physics, or related field plus 4 years of industry work experience.

OR

  • Master's degree in Electrical or Computer Engineering, Computer Science, Math, Physics, or related field plus 3 years of industry work experience.


Minimum Required Qualifications:

  • Solid understanding and experience of analog mixed signal circuit blocks validation.

  • 4 plus years of DDR (or SerDes) validation.

  • 4 plus years of experience with debug skills.

  • 4 plus years of hands-on experience with lab equipment including sampling scopes, BERT.


Preferred Qualifications:
10 plus years of experience in one or more of the following areas:

  • Understanding of high-speed characterization principles.

  • Familiarity with the design and implementation of high speed SerDes.

  • Familiarity with DDR architecture sub-components such as CTLE.

  • In-depth knowledge of bench test equipment: high bandwidth sampling / real-time scopes, spectrum analyzers, BERT and TDR from major equipment vendors.

  • Test automation scripting for system boards and lab equipment.

  • Python and/or R Scripting Experience.

Inside this Business Group

In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intels products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moores Law and groundbreaking innovations.  DEG is Intels engineering group, supplying silicon to business units as well as other engineering teams.  As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.



Other Locations

US, California, Folsom;US, California, Santa Clara;US, Texas, Austin


Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Posted: 2022-05-09 Expires: 2022-06-09

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SoC Design Engineer

Intel
Allentown, PA 18101

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