21 days old

SOC Design Engineer: Chipsets SOC Front-End Design

Intel
Folsom, CA 95630
  • Job Code
    JR0227873
Job Description

Come and be a part of the team creating SoC and chip-set designs and products for Intel Architecture. This position is a role within the Chipsets Silicon Group SOC Front-End Design team, building SoC products for client and server markets. In this position, the Engineer will perform integration and validation of IP designs at the SOC level. The work will include features and behaviors fundamental to the platform, as well as interoperability with the other IPs and blocks in the SOC and platform. The engineer will work with, and gain exposure to, specialist teams and engineers including full-chip, micro-architecture, validation architecture, emulation modeling and validation, IP design, and structural / physical design; will gain exposure on platform architecture, design, and features; and will participate in debug at various level of the hierarchy.

In addition to the qualifications listed below, the ideal candidate will demonstrate the following behavioral traits:

  • Excellent communication skills

  • Willingness to work in a team

  • Leadership skills


Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:

The candidate must possess a Bachelors in Electrical or Computer Engineering and 5+ years of experience or Masters degree in Electrical or Computer Engineering 4+ years of experience in:

  • System Verilog / OOP

  • SOC-level design/integration and/or validation

  • Simulation-based debug (VCS, Verdi, DVE)

  • Computer Architecture


Preferred Qualifications:

  • Experience in OVM/UVM

Inside this Business Group

In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intels products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moores Law and groundbreaking innovations.  DEG is Intels engineering group, supplying silicon to business units as well as other engineering teams.  As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.



Other Locations

US, California, Santa Clara


Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.



Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.

Posted: 2022-06-13 Expires: 2022-07-14

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SOC Design Engineer: Chipsets SOC Front-End Design

Intel
Folsom, CA 95630

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