2 days old

SOC Design Engineer

Phoenix, AZ 85003
  • Job Code
Job Description

Intel is a company of bold and curious inventors and problem solvers who create some of the most astounding technology advancements and experiences in the world. With a legacy of relentless innovation and a commitment to bringing smart, connected devices to every person globally, our diverse and brilliant teams are continually searching for tomorrow's technology and revel in the challenges that come with changing the world.

Custom ASIC Solutions engineering group (Part of Data Center and Artificial Intelligence group) is seeking an industry-experienced leader to join our custom silicon design team as a System On Chip (SOC) Physical design lead. The Custom ASIC business is poised for explosive growth in areas such as custom processors, accelerators for Application processing (AI and media), and Infrastructure (Smart NIC and switches). This is your chance to help define and drive our success.

As a SOC physical design lead, you will be an integral member of a team developing and executing the design of leading-edge custom products for large data center customers.

Responsibilities include but not limited to:

  • Provide physical implementation and static timing verification of multiple partitions and/or subsystems by leading a small team.

  • Apply synthesis and place and route knowledge to take the design from RTL to complete design closure for tape out.

  • Contribute and make high-impact technical decisions from design planning phase to the final signoff phase.

  • Partner with teams of experts who provide RTL, DFT, and hard-IP to maximize design efficiency, make data driven decisions while sharing knowledge, and build a stronger team.

  • Plan, track, and manage the execution of multiple partitions or a subsystem.

  • Report status and updates on projects to management.

  • Apply machine learning to the massive design data and enable a leap forward in design productivity.

  • Problem solving skills, in-depth analysis capability, and engineering curiosity.

  • Innovate and apply creative solutions.

  • Work with various programs and share knowledge from one project to another across the organization.

  • Work in tight team collaboration settings, be the role model, and motivate the team.

  • Communicate complex topics in both written and verbal forms.

  • Experience in advanced VLSI design concepts, in the areas of RTL synthesis, place and route, static timing, reliability and IR-drop, formal verification, multi-power domain design, and multiple RTL2GDS tape out experiences.


Minimum Requirements
BS Electrical Engineering, Computer Engineering, Computer Science, or a related field with minimum 4+ years of experience

Preferred Qualifications

  • Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field

  • 10 years of experience in related industry

  • Experience in tapeout or design methodology and tool automation skills

Inside this Business Group

The Data Center & Artificial Intelligence Group (DCAI) is at the heart of Intels transformation from a PC company to a company that runs the cloud and billions of smart, connected computing devices. The data center is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologiesspanning software, processors, storage, I/O, and networking solutionsthat fuel cloud, communications, enterprise, and government data centers around the world.

Other Locations

US, California, Santa Clara;US, Oregon, Hillsboro;US, Texas, Austin

Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.

Posted: 2022-05-25 Expires: 2022-06-25

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SOC Design Engineer

Phoenix, AZ 85003

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