14 days old

SoC Design Verification Engineer

Santa Clara, CA 95050
  • Job Code
Job Description

Come and join us. Intel is seeking highly qualified candidates to join the BXD (Barefoot Switching Division) in our Network and Edge Group (NEX) as a Design Verification Engineer. We're part of the Connectivity Group (CG) in Intel's NEX and are looking for motivated, passionate, and talented design engineers to join our Networking Applications development team for programmable high-speed switching ASICs. We're a strong, vibrant, cross-site team that helps drive Intel's programmable switching technology and products to position Tofino as the switching platform of choice for Cloud and Data Center network deployments. In this role, as part of the Chip team, you will need to be passionate about developing high-performance programmable switching ASICs. You will have an excellent opportunity to verify the next generation Intel Programmable Ethernet Switch. As a verification engineer, you will be responsible for building efficient and effective directed and constrained-random validation environments that exercise designs through their corner-cases and demonstrate conformance to specifications. You need analytic and waveform analysis skills, knowledge of digital design, understanding of object-oriented programming, and detailed understanding of IEEE and IETF specifications to verify large networking ASICs comprised of tens of billions of transistors. You will be responsible for development of UVM test benches and tests, developing test plans, coverage plans, and coding functional coverage. The ideal candidate should exhibit the following behavioral traits:

  • Must be a team player with problem-solving and communication skills
  • Personal drive and willing to be dedicated
  • Work independently and at various levels of abstraction
  • Thoughtful and perceptive analytical capability
  • A genuine curiosity for understanding the system 


Candidates must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Education Qualifications:

  • Bachelor's degree in Electrical or Computer Engineering, Computer Science, or related field and 7+ years of industry work experience, or
  • Master's degree in Electrical or Computer Engineering, Computer Science, or related field and 5+ years of industry work experience, or
  • PhD in Electrical or Computer Engineering, Computer Science, or related field and 3+ years of related work experience

Minimum Required Qualifications:

  • 5+ years of experience in System Verilog and UVM
  • 5+ years of experience in developing functional coverage plans and coding coverage

Preferred Qualifications:

  • Experience in System Verilog and UVM
  • Experience in Switch Silicon verification
  • Experience in PCIe or CPU verification
  • Experience with scripting languages, e.g. Python
  • Experience with Synopsys simulation and coverage tools

Inside this Business Group

The Network & Edge Group brings together our network connectivity and edge into a business unit chartered to drive technology end to end product leadership. It's leadership Ethernet, Switch, IPU, Photonics, Network and Edge portfolio is comprised of leadership products critically important to our customers.

Other Locations

US, Arizona, Phoenix;US, North Carolina, Raleigh;US, Oregon, Hillsboro

Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.

Posted: 2022-05-10 Expires: 2022-06-11

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SoC Design Verification Engineer

Santa Clara, CA 95050

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