The world is transforming - and so is Intel. Here at Intel, we work every single day to design and manufacture silicon products that empower peoples digital lives. The Xeon Engineering Group is looking for a SOC Micro-Architect for Manageability development to join our organization. Together we will deliver the next generation of server product.

The candidate is expected to actively collaborate and drive the development of Manageability Micro-architecture specifications and the design implementation for Xeon SOCs.

Job responsibilities include but are not limited to:

• Leading all phases of SOC manageability architecture and design including micro-architectural and definition thru validation phase.

• Working with platform and IP architects on feature definition, scoping, feasibility studies and design tradeoff analysis.

• Collaborating closely with platform planning teams, IP architects, validation, firmware and physical design teams, owning end-to-end quality of manageability features on SoC.

• Drive resolution of issues with IP and SOC development and post-Si debug team to meet schedule and quality.

• Drive and help build forward looking strategy for Manageability features for the SOC roadmap.

• Solid leadership skills, self-motivated, persistent, and resilient with the willingness to operate in face of ambiguity.

Qualifications

Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:
The candidate must have a Bachelor's degree in Electrical/Computer Engineering or Computer Science and 6+ years of relevant industry experience.

OR

Master's degree in Electrical/Computer Engineering or Computer Science and 4+ years of relevant industry experience.

OR

PhD in Electrical/Computer Engineering or Computer Science and 2+ years of relevant industry experience.

Qualifying work experience must be in/with:

• SoC Architecture, Design, or Validation.

• Manageability IP Architecture, Design, or Validation.

• Software engineering skills such as Linux, C++, GIT, GDB, and Python.

Preferred Qualifications:

• Architecture, design, or validation experience on CPU/server product.

• Experience with Manageability IP functionality.

• Comfortable operating in a dynamic environment with rapidly changing priorities and direction.

• Solid problem solving, debugging, multi-tasking, and brainstorming skills.

Xeon and Networking Engineering (XNE) focuses on the development and integration of XEON and Networking SOC's and critical IP's sustain Intels Xeon and 5G networking roadmap.

Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.