15 days old

SOC Power and Performance Engineer

Intel
Santa Clara, CA 95050
  • Job Code
    JR0227230
Job Description

In this position, you will be a member of the Data Center Design Power and Performance (DCD PnP) team. The DCD PnP team is responsible for projecting and optimizing the power, binsplit, thermals, and performance for Data Center products including Xeon, Xeon-D, and Atom-based SoCs. We offer exciting opportunities to develop technical depth and leadership.

Primary responsibilities include but are not limited to:

  • Lead physical-design based power optimization for all Data Center products
  • Build and maintain IP and SOC power models utilizing architectural, design, and process specifications; historical power data; and current generation scaled power estimates
  • Identify and drive power and thermal optimizations to meet SOC PnP goals
  • Set workload-based power targets for IPs and SoCs that support the market requirements and drive teams to meet these goals


Additional responsibilities include:

  • Deliver power data to partners to enable power delivery design, thermal modeling, and performance optimization
  • Audit power estimate quality from IP and SoC teams
  • Drive improvements to IP and SOC PnP methodology
  • Influence product definition starting from Pathfinding
  • Define segment-specific workloads for power specifications
  • Participate in SKU definition to match PnP capabilities with manufacturing and marketing needs
  • Collaborate worldwide with DCD PnP and cross-functional partner teams including SOC and IP Design, Architecture, Performance, Power Management, Power Delivery, Marketing, Planning, and Process


Qualifications

Minimum Qualifications:
The candidate must have a Bachelor's degree in Electrical Engineering or Computer Engineering or Computer Science or equivalent practical experience.
4+ years of SOC design, power analysis and modeling experience.

Preferred qualifications:

  • Master's or PhD degree in Electrical Engineering or Computer Engineering or Computer Science or equivalent practical experience.

6+ months experience with:

  • SOC design, power analysis and modeling
  • Knowledge of power-aware design and identification of architectural, logical, and physical power reduction opportunities
  • Understanding of power/performance trade-offs and optimizations
  • Experience with industry-standard power estimation tools
  • Programming or scripting languages, preferably in Perl, Python, or TCL
  • Knowledge of general computer architecture and silicon concepts


The ideal candidate will also be:

  • Skilled in effective communication, leadership, and teamwork
  • Analytically-driven with sol problem-solving abilities
  • A resourceful and disciplined self-starter
  • Thorough and detail-oriented

Inside this Business Group

Xeon and Networking Engineering (XNE) focuses on the development and integration of XEON and Networking SOC's and critical IP's sustain Intels Xeon and 5G networking roadmap.



Other Locations

Israel, Haifa;US, Arizona, Phoenix;US, California, Folsom;US, Massachusetts, Hudson;US, Oregon, Hillsboro;US, Texas, Austin


Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.



Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.

Posted: 2022-06-20 Expires: 2022-07-21

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SOC Power and Performance Engineer

Intel
Santa Clara, CA 95050

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