5 days old

SOC RTL Design Engineer

Austin, TX 78701
  • Job Code
Job Description

In this role you will be part of the DEG Xeon and Networking Engineering (XNE) design team working on next-generation Networking and Xeon server product SOCs.

This is a dynamic SoC team where you will own subsystem integration as well as global fabrics and IP development.

You will be responsible for the RTL integration of one or more IPs/subsystems into server/networking SoCs starting with Technology Readiness (TR) through RTL1.0 and Tape-In. TR work will include assessing new IPs/features, Tools, Flows, Methodology (TFM) proposed changes, design effort/complexity, etc.

You will work closely with validation, physical and architecture teams creating the infrastructure as well as debugging and root causing design defects. For IP development, you will code the RTL functionality, help define verification strategies and ensure the RTL meets the physical design team's implementation specs.

You will analyze and use results to drive bug fixes into both SOC RTL as well as subsystems/IPs. You will determine, specify and evaluate the viability of complex hardware features/structures and ensure that software and hardware designs interface correctly.

You will design frameworks for particular functions.

You will also define, document, and test processes for inclusion into technical platforms, sub-system specifications, input/output and working parameters for hardware and/or software compatibility.

As part of our Austin SoC team, you will influence the shaping of future server and networking products by contributing to the architecture used across design families. You will work closely with silicon architects, verification engineers, structural design engineers, Internal/External IP vendors, and DFT/DFD teams and get exposure to all aspects of product development.

You will be part of an Austin-based SoC Product Design team that encourages innovation, learning, team collaboration and thinking outside of the box to address all of our product development challenges.

In addition to the qualifications listed below, the ideal candidate will also have to be a great team player with excellent interpersonal skills, excellent analytical, problem solving and verbal/written communication skills, very good logical thinking, ability to prioritize work and multi-tasking, strong scripting/coding skills, Unix user expertise, Bug filing systems, etc.


You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:

Candidate must possess a Bachelor's degree in Electrical Engineering, Computer Engineering, or Computer Science and 4+ years experience - OR - a Master's degree in the same fields with 3+ years experience with/in:

  • SoC or IP for SoC RTL design or pre-silicon validation.

  • SoC Design flows from micro-architecture to structural design.

  • Hands-on RTL implementation, IP integration, RTL releases meeting the quality checks, which include: Linting, CDC, synthesizability, constraints.

  • Digital design basics and experience in System Verilog coding.

  • User of standard ASIC EDA tools like VCS, Lint, CDC, DC, Spyglass, LEC, Fishtail, etc.

Preferred Qualifications:

1+ years experience with:

  • Power aware design, UPF & multi-power domain checks

  • Wireless communication

  • Networking protocols knowledge

  • Familiarity with 5G, LTE protocols

Inside this Business Group

In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intels products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moores Law and groundbreaking innovations.  DEG is Intels engineering group, supplying silicon to business units as well as other engineering teams.  As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.

Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.

Posted: 2022-05-22 Expires: 2022-06-22

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SOC RTL Design Engineer

Austin, TX 78701

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