By applying to this posting your resume and profile will become visible to Intel Recruiters / Sourcers and will allow them to consider you for current and future job openings aligned with the skills and positions mentioned above.

Youll be considered for multiple roles within Design Enablement/AD: Advance Design group, you will join a highly motivated team who delivers Critical technologies to Intel such as:

• Digital and Analog Standard Cell Libraries
• Embedded Memory (SRAM, RF, ROM, eDRAM, Fuse, etc.)
• Analog Circuit Reference Designs (PLL, DLL, VR, etc.)
• High-speed I/O Reference Designs (DDR, SerDes, GPIO)
• RF and Wireless Circuits (WaveGuide TX, Power Amplifier)

In this position you will help us with one or more of the following responsibilities:

• standard cell library definition, circuit implementation, layout architecture, design rule closure, optimization for performance and robustness, modeling, and characterization.
• Power-Performance-Area Optimization
• Optimize block Power-Performance-Area (PPA) with emphasis on synthesis, place, and route on latest internal/external core/graphics/soc designs
• Provide standard-cell architecture feedback to the library team through block PPA
• Explore memory options for next technology nodes and provide block PPA impact
• Co-optimize Tools & Flow Methodology (TFM) with EDA tool vendors to improve PPA and deliver world-class technology node offerings
• Work closely with product teams to provide block PPA guidance and TFM recommendations
• Develop in-house physical design machine learning capability to explore design solution space, improve block PPA, and guide process technology optimization
• Develop software to automate layout and/or schematic generation for library collaterals
• Develop software for data analysis on library development and validation
• Realize block PPA designs on silicon through test-chips

This is an entry level position and will be compensated accordingly.

Qualifications

This requisition has the skillset of different positions under the same opening. Therefore, several hiring managers will have the opportunity to review your profile, if you have one or more of the listed requirements, feel free to apply, you will have the opportunity to showcase your resume to more managers at the same time, a great chance to apply and get matched.

Education and experience that will get you noticed:

You should have Bachelor/Master/PhD in Electrical Engineering, Computer Engineering, Computer Science, or other related Electrical Scientific STEM field.

6+ months of work or educational experience in at least one of the following areas:

• EDA tools and methodologies for optimal Performance/Power/Area/Cost
• VLSI Design
• Semiconductor device physics and scaling
• UNIX/Linux computing platform
• Software development/programming in high-level languages (e.g., Java, C++, TCL, Lisp, Scheme, Perl)

Preferred experience in one or more of the following areas:

• Tools, flow & Methodology (TFM) for STCO/3DIC
• SoC/IP Physical design
• Floorplan optimization for block Power
• Logic Synthesis, Place & Route, Static Timing
• Timing budgeting and analysis
• Power grid design and IR analysis
• Artificial Intelligence, Machine Learning (AI/ML)
• CAD tools from Cadence, (Virtuoso, Spectre and its scripting language SKILL), Synopsys (Custom Designer, Hspice, Star-RC, IC Validator) and Mentor (Calibre)
• Technology design rules, process development, and process integration
• PDK/P-Cell development
• Analog design

As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support.  Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moores Law to bring smart, connected devices to every person on Earth.

Other Locations
US, Oregon, Hillsboro; US, California, Folsom; US, Arizona, Phoenix; US, Texas, Austin;

Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.

Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.