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Job CodeJR0211655
In this position you will be part of the world class SOC design team within the Xeon Performance Group XPG designing the next generation Xeon SoCs/IPs for Server markets.
Qualifications
Minimum
qualifications are required to be initially considered for this
position. Preferred qualifications are in addition to the minimum
requirements and are considered a plus factor in identifying top
candidates.
Minimum
Qualifications:
The candidate must have a Bachelor's degree in Electrical/Computer Engineering or Computer Science and 4+ years of relevant industry experience
-OR-
Master's degree in Electrical/Computer Engineering or Computer Science and 3+ years of relevant industry experience
Preferred
Qualifications:
Completed full physical design cycle, from arch/feature eval related to physical design, through design execution, and to design verification and closure.
Familiar with floorplanning, timing constraint budgeting, and multiple voltage domains handling.
Familiar physical integration tools/flows, such as Fusion Design Planning and/or parade, timing rollups, physical assembly.
Familiar with Synopsys/Cadence EDA tool sets, such as Fusion Compiler, ICC, PT, PTPX, LEC.
Familiar with highly structured design requiring custom solutions such as preroutes, preplacement Scripting and automation skills.
Willing and comfortable with diverging from default project methodologies and flows when necessary.
Familiar with Cheetah2 physical design environment
The ideal candidate should exhibit the following
behavioral
traits:
Leadership and mentorship skills.
Take initiative to tackle challenging problems.
Problem-solving skills.
Willing to multitask.
Written and verbal communication skills.
Willing to work in a dynamic and team-oriented environment.
Requirements listed would be obtained through a combination of
industry relevant job experience, internship experiences and or
schoolwork/classes/research.
Xeon and Networking Engineering (XNE) focuses on the development and integration of XEON and Networking SOC's and critical IP's sustain Intels Xeon and 5G networking roadmap.
Intel
strongly encourages employees to be vaccinated against COVID-19.
Intel aligns to federal, state, and local laws and as a contractor
to the U.S. Government is subject to government mandates that may
be issued. Intel policies for COVID-19 including guidance about
testing and vaccination are subject to change over
time.
Posting
Statement
All qualified
applicants will receive consideration for employment without regard
to race, color, religion, religious creed, sex, national origin,
ancestry, age, physical or mental disability, medical condition,
genetic information, military and veteran status, marital status,
pregnancy, gender, gender expression, gender identity, sexual
orientation, or any other characteristic protected by local law,
regulation, or
ordinance.
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.
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