12 days old

Software and System Validation Engineer

San Jose, CA 95113
  • Job Code
Job Description

Intel Programmable Solutions Group (PSG) is looking for our next Security System Validation Engineer for hardware accelerators ASICs.

The job includes learning state of the art technology, defining security validation strategy, software development, post-silicon enablement, and debug.

Main responsibilities:

  • Define and develop security validation plan and automation (hands on content development and debug, engagement with tools teams to develop state of the art validation tools/methodologies).

  • Triage and debugging of failures.

  • Review Security aspect for Specs and test plans documents.

  • Interfaces with IPAS, Architecture & Design teams at SoC and system level meet schedule with quality.

  • Security education and mentoring across team.


You must possess the below minimum education requirements and minimum required qualifications to be initially considered for this position. Relevant experience can be obtained through schoolwork, classes, project work, internships, and/or military experience. Additional preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.


Bachelors Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field.

Minimum Qualifications

3+ years of total experience, experience should include:

  • Experience in a hardware or software role.

  • Debug experience.

  • Experience with C, C++, Perl, and/or Python.

  • Experience in a Linux/UNIX environment.

Preferred Qualifications

One or more of the following is considered a plus factor:

  • Experience in Security (e.g., Security Development Lifecycle, Threat modeling review, security assurance dependencies and best practices).

  • Security architecture reviews, design reviews and implementation reviews experience.

  • Experience in software or Hardware System Bring-up or Silicon Power-On.

  • 5+ years of experience in a post-silicon validation role or developing test plans.

  • Experience developing test automation.

  • Experience with system architecture preferably Intel architecture/Arm Architecture.

  • Experience debugging or developing emulation models.

  • Experience designing and deriving testing for system clock/system reset flows.

  • Experience with lab equipment (Logic Analyzers, Oscilloscopes, protocol analyzers, JTAG/ITP debugger).

Inside this Business Group

The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.

Other Locations

US, Arizona, Phoenix;US, California, Santa Clara;US, Oregon, Hillsboro;US, Oregon, Portland

Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Posted: 2022-05-16 Expires: 2022-06-16

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Software and System Validation Engineer

San Jose, CA 95113

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