We are a global leader, creating world-changing technology that enables progress and enriches lives. Intel is at the intersection of several technology inflections - artificial intelligence, 5G network transformation, and the rise of the intelligent edge- that together will shape the future of technology.

As a member of Intel's Programmable Solutions Group (PSG), you will use your experience of Logic Design, SOC architecture to lead efforts at a system level in enabling customers, both internal and external, to use the Structured ASIC technology.

In this role, the successful incumbent will oversee the definition, design, verification, and documentation for SoC (System on a Chip) development.

Determines architecture design, logic design, and system simulation.

Defines module interfaces/formats for simulation.

Performs Logic design for integration of cell libraries, functional units and subsystems into SoC full chip designs, Register Transfer Level coding, and simulation for SoCs.

Contribute to the development of multidimensional designs involving the layout of complex integrated circuits.

Performs all aspects of the SoC design flow from high-level design to synthesis, place and route, timing and power to create a design database that is ready for manufacturing.

Analyzes equipment to establish operation infrastructure, conducts experimental tests, and evaluates results.

May also review vendor capability to support development.

Qualifications

You must possess the below minimum education requirements and minimum required qualifications to be initially considered for this position. Relevant experience can be obtained through schoolwork, classes, project work, internships, and/or military experience. Additional preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Education

Bachelors' degree in Electrical Engineering, Electrical Electronics, Computer Engineering, or related field

Minimum Qualifications

7+years of experience in the following:

RTL design for low power and testability.

RTL design using Verilog/System Verilog.

Front End RTL tools and design methodologies.

Interfacing with Physical Design team to support floor-planning, timing constraints, ECO.

SOC architecture, design flows and debug skills.

Preferred Qualifications

Masters' degree in Electrical Engineering, Electrical Electronics or Computer Engineering with 7+ years of experience.

5+ Experience in RTL synthesis and DFT / MBIST insertion

SOC level clocking, reset and power management

High performance, digital logic designs and integration

Post-Si lab debug and power-on

The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.

Other Locations

US, California, San Diego;US, Texas, Austin

Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.