7 days old

Standard Cell Library Engineer

Intel
Santa Clara, CA 95050
  • Job Code
    JR0219303
Job Description

Job Description

 

In this position, you will participate in the design, development, validation and delivery of standard cell libraries using leading process technologies for use in the design of Intel's next-generation SoCs and microprocessors.

 

Responsibilities include, but are not limited to:

       Design and implementation of the combinatorial, clock, power management and sequential circuits for Intel's newest process technologies.

       Parasitic extraction and circuit optimization for power/performance/robustness/density.

       Library characterization for timing, noise, power and variation models (non-linear delay models and composite current source models, parametric on chip variation models).

       Reliability verification of standard cells covering ERC, EM, SH, FinFet self-heating. APL characterization and modeling.

       Developing functional models behavioral Verilog, power udp Verilog and fault models.

       Development of automation for library modeling, validation, quality checking, performance and reliability verification.

       The library build, validation, QA, release, and support


Qualifications

Qualifications

Minimum Qualifications:

       You must possess a minimum of Bachelor's degree or Master's degree in the field of electronics engineering.

       Specialization or experience in VLSI is preferred.

 

Preferred Qualifications:

       A minimum of 2+ years of relevant experience in standard cell library design.

       The successful candidate must possess excellent written and verbal communication skills, solid customer/result orientation and the willingness to work with external and internal partners in a flexible manner.

Inside this Business Group

IP Engineering Group's (IPG) vision Build IPs that power Intel's leadership products and power our customer's silicon. We want to attract & retain talent who get joy in building high quality IP and share our core belief that IP is fundamental to transforming Intel's silicon design process. IPG's guiding principles will be ensuring Quality (Zero Bugs), Customer Obsession (Delight our Customers) and structured Problem Solving. We are a fearless organization transforming IP development.


Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.



Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.

Posted: 2022-05-18 Expires: 2022-06-19

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Standard Cell Library Engineer

Intel
Santa Clara, CA 95050

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