14 days old

Standard Cell Library Pathfinding Engineer

Intel
Hillsboro, OR 97123
  • Job Code
    JR0210248
Job Description

Intel Advanced Design Group has the primary focus of Design-Technology Co-optimization (DTCO) and Foundational IP development to enable best-in-class product designs.

Library Technology team in Advanced Design is looking for a highly motivated and qualified individual to develop and co-optimize standard cell layout architectures through active collaboration with process technologists, product design stake holders, and EDA vendors to achieve best-in-class cell/block level PPA (Power, Performance and Area) and competitive EoU (Ease of Use).

Other considerations of standard cell architecture design include robust/efficient power delivery, mitigation of local layout effects, and minimization of process risks/costs. Other responsibilities include test-chip planning/execution and Si validation of standard cells to track yield, Vmin and power/performance.

Important behavior traits:

  • Communication and interpersonal skills to champion initiatives internally and externally, and with executive management and external partners

  • Technical, analytical, and cross-functional collaboration skills


Qualifications

You must possess the below requirements to be initially considered for this position. Preferred qualifications are in addition to the requirements and are considered a plus factor in identifying top candidates.

Minimum requirements:

M.S. in Electrical Engineering, Computer Science, Computer Engineering, or related field with 3+ years of professional work experience.

Or

Ph.D. in Electrical Engineering, Computer Science, Computer Engineering, or related field.

Expertise/Experience in the following areas:

  • Digital CMOS design  
  • Physical design including DRC
  • EDA tool/flow/methodology

Preferred requirements:

  • Standard cell modeling, extraction, and characterization
  • Experience on any of the following: standard cell design, DTCO, SoC design, or process technology development
  • Design tradeoffs
  • Foundry ecosystem and benchmarking practices
  • Product and IP development

Inside this Business Group

As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support.  Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moores Law to bring smart, connected devices to every person on Earth.


Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.



Work Model for this Role

This role is available as fully home-based and generally would require you to attend Intel sites only occasionally based on business need.

Posted: 2022-05-07 Expires: 2022-06-07

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Standard Cell Library Pathfinding Engineer

Intel
Hillsboro, OR 97123

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