18 days old

Static Timing Design Automation Engineer

Intel
Hillsboro, OR 97123
  • Job Code
    JR0222853
Job Description

We are the Product Enablement Solutions Group (PESG). Come join our world class CAD team and take part in developing the future IPs, Cores, and SOCs that will change the world!


We are looking for motivated engineers to deliver cutting-edge tools, flows, and methodologies for improving design productivity and drive Design-Technology co-optimization.

PESG is a worldwide organization that delivers an end-to-end design system for development of Intel's IPs, Cores, and SOCs. We partner with the hardware design teams and EDA vendors. We leverage a mix of experts with different backgrounds, cultures, perspectives, and experiences to deliver a world-class design system that powers Intel's leadership products.

Your responsibilities may include, but are not limited to:

  • Delivering world-class Tools, Flows and Methodologies (TFM) to Intel's IP, Core, and SoC product design teams

  • Performing Power/Performance/Area trade-off exploration and analysis

  • Enabling leading edge process technologies on Intel and external foundries

  • Enhancing design team productivity by increasing throughput, reducing iterations, and enabling larger and larger blocks

  • Working on cutting edge technologies such as Machine Learning and Cloud

Other important attributes:

  • Willing to create and drive concepts to innovative solutions

  • Strong verbal and written communication skills

  • Analytical and problem solving skills

  • Effective team player with continuous learning mindset


Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your schoolwork/classes/research and/or relevant previous job and/or
internship experiences. This is an entry level position and will be compensated accordingly.

 

Minimum Qualifications

The candidate must have a Bachelor's Degree in Electrical/Computer Engineering or Computer Science and 1+ years of experience -OR- a Master's Degree in Electrical/Computer Engineering or Computer Science and:

  • Static Timing Analysis tools/flows/methodology

Preferred Qualifications

  • Key timing aspects including cross-talk, OCV effects, margins, and constraints

  • Using and debugging industry standard Static Timing Analysis tools such as Primetime

  • Programming in scripting languages

Inside this Business Group

Product Enablement Solutions Group (PESG) is one of the key pillars, enabling Intel product design teams get to market faster with winning leadership products.


Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.



Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.

Posted: 2022-06-16 Expires: 2022-07-17

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Static Timing Design Automation Engineer

Intel
Hillsboro, OR 97123

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