30 days old

Structural Design Engineering Manager

Intel
Santa Clara, CA 95050
  • Job Code
    JR0214405
Job Description

At Intel, we work every single day to design and manufacture silicon products that empower peoples digital lives. Do you love to solve technical challenges that no one has solved yet? Do you enjoy working with cross functional teams to deliver IP solutions for products that impact customers lives? If so, this might be the team for you.As a Manager, set priorities for the team, get results across boundaries, ensure an inclusive work environment, develop employees, and manage performance.Responsibilities will include but not limited to:Oversees definition, design, verification, and documentation for SoC (System on a Chip) development.Determines architecture design, logic design, and system simulation.Defines module interfaces/formats for simulation.Performs Logic design for integration of cell libraries, functional units and subsystems into SoC full chip designs, Register Transfer Level coding, and simulation for SoCs.Contributes to the development of multidimensional designs involving the layout of complex integrated circuits.Performs all aspects of the SoC design flow from highlevel design to synthesis, place and route, timing and power to create a design database that is ready for manufacturing.Analyzes equipment to establish operation infrastructure, conducts experimental tests, and evaluates results.May also review vendor capability to support development.Selects, develops, and evaluates SoC design engineers to ensure the efficient operation of the function.In addition to the qualifications listed below the ideal candidate will also have:Excellent analytical and problem-solving skillsStrong verbal/written communication skillsEffective team player with continuous learning mindsetWillingness to balance multiple tasksWillingness to work in a fast-paced environment and have as much fun and growth as possible in the process


Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates

Minimum Qualifications:
Candidate must have a Bachelor's degree in Electrical/Computer Engineering or Computer Science and 9+ years of experience OR a Master's degree in Electrical/Computer Engineering or Computer Science and 6+ years of experience in:
Lead and/or manage a SD design team thru successful projects
Design experience in integration of Mixed Signal IP into the ASIC including digital design and Structural design challenges
Willingness to quickly learn enough depth on new technologies to support strategic discussions and set direction
A combination of technical and general business acumen organization savvy networking capabilities and expertise to get results across multiple groups and disciplines
EDA design tools is a must have including high degree of proficiency with DCT PT ICCDP ICC ICVA
Successful candidate should be very proficient in all aspects of physical design from RTL handoff through streaming out a clean GDSII floorplan synthesis APR, SIV, RV, Power analysis, and Timing closure

Inside this Business Group

IP Engineering Group's (IPG) vision Build IPs that power Intel's leadership products and power our customer's silicon. We want to attract & retain talent who get joy in building high quality IP and share our core belief that IP is fundamental to transforming Intel's silicon design process. IPG's guiding principles will be ensuring Quality (Zero Bugs), Customer Obsession (Delight our Customers) and structured Problem Solving. We are a fearless organization transforming IP development.



Other Locations

US, Arizona, Phoenix;Virtual US and Canada


Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Annual Salary Range for jobs which could be performed in US, Colorado:
$148,930.00-$238,410.00


Benefits:
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, and benefit programs. Find more information about our Amazing Benefits here

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.


Intel is committed to a culture of accessibility.  Intel provides accommodations to applicants and employees with disabilities.  Find information and request accommodation here

Posted: 2022-04-27 Expires: 2022-05-28

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Structural Design Engineering Manager

Intel
Santa Clara, CA 95050

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