27 days old

Substrate Path Finding Packaging Research and Development Engineer

Phoenix, AZ 85003
  • Job Code
Job Description

Become a part of Intel's Advance Packaging Team by joining the Substrate Packaging Technology Development (SPTD) organization. Our mission is to be the supplier of choice for leading and affordable substrate packaging. Join the SPTD organization to assist in achieving our mission and continuing to make this a great place to work.

Substrate Path Finding Packaging Research and Development Engineer defines and establishes process flow, procedures, and roadmaps for package substrate development.
Responsibilities include: researching and benchmarking various chemistries/processes used in substrate processing steps- related to finish steps of substrate manufacturing process; collaborate across multiple interdisciplinary teams to drive substrate development; innovating, problem solving, and continuously improving materials in substrate manufacturing; providing project management, package design/development and sustaining support for integrated circuit or semiconductor assemblies; interacting with substrate and equipment suppliers, and international travel is required for project management and technical discussions with suppliers.

This in an entry level position and compensation will be given accordingly.


You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the requirements and are considered a plus factor in identifying top candidates.

Knowledge and/or experience listed below would be obtained through a combination of your school work and/or classes and/or research and/or relevant previous job and/or internship experiences .

Minimum Qualifications:

-Candidate must possess a MS degree with 6+ months of experience or Ph.D. degree with 1+ years of experience in Materials Science and Engineering, Mechanical engineering, Chemical Engineering, Chemistry, or other applied engineering field.

Must have the required degree or expect the required degree by July 2022.

Preferred Qualifications:

1+ years of experience in the following:

- Experience and knowledge in electrochemistry fundamentals.
- Prior experience in material testing techniques (e.g. DMA, TMA) and overall knowledge in solid mechanics concepts.
- Previous experience and overall working knowledge of some or all the following: optical microscopy, electron microscopy (SEM, FIB, TEM, EBSD), analytical techniques (FTIR, Raman, TGA, DSC), Surface analysis (XPS, TOF-SIMS), EDS, AFM, XRD, mechanical cross-sections and other package-level failure analysis techniques.
- High tolerance of ambiguity and flexibility in dealing with dynamic nature of project scope
- Understanding of semiconductor packaging and semi-conductor substrate fabrication processes and technology.

Inside this Business Group

As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support.  Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moores Law to bring smart, connected devices to every person on Earth.

Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.

Posted: 2022-04-27 Expires: 2022-05-28

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Substrate Path Finding Packaging Research and Development Engineer

Phoenix, AZ 85003

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