30 days old

Switch Silicon Architect

San Jose, CA 95113
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Job Description

The Intel Switch and Fabric Group (XFG) is at the forefront of cloud-to-edge intelligent network switch silicon, software, standards and systems.  XFG is part of the Connectivity Group (CG) which is at the heart of Intels transformation from a PC company to a company that powers the cloud and connects billions of smart, computing devices. Since announcing the first Intel Tofino programmable Ethernet switch ASIC, our team continues to lead the industry with cutting-edge technology, scalable high-volume manufacturing and participation in open industry standards. Our dedication to advanced development ensures that Intel Intelligent Fabric Processors (Intel IFPs) continue to drive future data center bandwidth growth with multiple form-factors, co-packaging and higher speeds up to 25.6 Tbps and beyond in the future. We are looking for talent to accelerate this journey. If you are interested in joining our leading organization, then we want to hear from you.

We are looking for a motivated and astute individual to join our team as a Silicon Architect specializing in the development of switch silicon. You will be joining a collaborative team responsible for building the world's leading programmable Ethernet switches. Our organization works on all levels of ASIC development starting from high-level architecture to low-level circuit design and product engineering.

In this role, you will use your knowledge of specifications, mathematics, and computation to architect and prototype components of complex networking ASICs.

Your Primary Responsibilities as Forwarding Architect may include:

  • Developing architecture and uarchitecture for network data plan functions such as L2/L3 switching and routing.

  • Tunneling, multicast, overlay and underlays, segment routing, traffic policy and access control lists (ACLs), packet forwarding and algorithms, Network Address Translation (NAT), packet buffering, QoS, etc.

  • Developing reference p4 programs, table flow diagrams, and dataflow diagrams.

  • Defining application level test plans for forwarding pipeline and logic elements.

  • Developing RTL, high-level (C++) models, and test-cases as needed.

The ideal candidate should exhibit the following behavioral traits:Strong analytical ability, problem solving and communication skillsAbility to work independently and at various levels of abstraction


Minimum Qualifications:

  • MS of PhD in Electrical Engineering, Computer Science, or equivalent.

  • 6+ years of experience in System Verilog and Verilog based logic design

  • 4+ years of experience developing RTL to do packet processing and modification or implementing Ethernet standards

Preferred Qualifications:

  • 10+ years of experience in developing network switch ASICs

  • 10+ years of experience in developing network software and having knowledge of data plane and control plane architectures in networking devices.

  • Experience with packet forwarding data plane APIs such as SAI

  • Experience in P4 programs and Programmable forwarding pipeline architectures

  • Experience with shared memory, output queued, spine-leaf, fabric, Clos architectures

  • Good understanding and working knowledge of Layer 3/4 network protocols such as TCP/IP and its variants as well as common standard IP protocols such as ARP, IP, ICMP, TCP, UDP, etc.

  • Proficiency in C/C++ and at least one scripting language like shell script, python etc.

Inside this Business Group

The Network & Edge Group brings together our network connectivity and edge into a business unit chartered to drive technology end to end product leadership. It's leadership Ethernet, Switch, IPU, Photonics, Network and Edge portfolio is comprised of leadership products critically important to our customers.

Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

This role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter....

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.

Jobs Rated Reports for Architect

Posted: 2022-06-06 Expires: 2022-07-07

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Switch Silicon Architect

San Jose, CA 95113

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