24 days old

SysDebug Lead

Folsom, CA 95630
  • Job Code
Job Description

Great opportunity to lead the Intel SoC debug team.

The Sysdebug Lead will work as part of the iVE's (Intel Validation Engineering) Client Advanced Validation Engineering team. The Sysdebug Lead is expected to lead Intel SoC silicon debug forums and perform hands-on debug in pre-/post-Silicon validation at SoC and platform level, meet schedule with quality, and be quick to ramp up in adjacent areas of expertise. This role works in cross-org and cross-site collaboration with IP/SoC Design/architecture/pre-si/FW/SW/BIOS and other post-Si teams within iVE to understand technical features, leverage BKMs, and lead debug and resolution of Silicon/firmware defects.

Responsibilities will include but not limited to:

  • Lead definition of silicon debug strategies, and draft debug plans along with cross functional teams.

  • Perform the role of Silicon Power-On Lead when required.

  • Provide mentoring to other team members on debug BKMs.

The candidate should exhibit the following behavioral traits:

  • One Intel mindset in leading execution, debug and resolution of defects.

  • Solid problem-solving skills.

  • Multitasking skills.

  • Solid written and verbal communication skills.

  • Proficient to work in a dynamic and team-oriented environment.

  • Good networking, communication, and influencing skills.

  • Excellent track record of team skills and collaboration skills.


An eligible candidate must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidate.

Minimum Qualifications:
Candidate must possess a Bachelors degree in Electrical Engineering or Computer Engineering or Computer Science and 6+ years of relevant experience.


Masters degree in Electrical Engineering or Computer Engineering or Computer Science and 4+ years of relevant experience.


PhD in Electrical Engineering or Computer Engineering or Computer Science and 2+ years of relevant experience in the following:

  • Silicon development in the areas of CPU, chipsets, logic or memory products.

  • Validation methodology development or strategy, planning and gap analysis for IP or SoC products.

  • Computer System Architecture.

  • Design validation of one or more areas like CPU, memory, I/Os or Audio, Vision, Sensing subsystems etc.

  • Firmware development or debug and programming languages such as C or C++ or Python.

Preferred Qualifications:

Experience in:

  • Silicon or Firmware development and debug of CPUs and/or chipsets.

  • Design validation of logic/circuits, IOs or subsystems.

  • Computer subsystem HW/SW stack, including the silicon, all onboard HW components and connectors and devices, drivers, and applications.

  • Handling various debug equipment such as JTAG, Logic Analyzer, high bandwidth real time/sampling oscilloscope, high frequency pulse/signal.

Inside this Business Group

The everyday contributions of the Intel Validation Engineering (iVE) team are essential to retaining/regaining Intel's product leadership. We validate, debug, and tune the newest designs and world-changing technologies that enrich the lives of every person on earth. We play a critical role in completing the PRQs of Intel products and in Intel's ability to deliver the annual technology platforms in our roadmap.

Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.

Posted: 2022-07-14 Expires: 2022-08-14

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SysDebug Lead

Folsom, CA 95630

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