30 days old

Technical Assistant / Chief of Staff to the Vice President, FPGA Design Engineering, PSG

Intel
San Jose, CA 95113
  • Job Code
    JR0212472
Job Description

The Custom Logic FPGA Design Engineering (CFDE) group is part of Intel's Programmable Solutions Group (PSG). PSG portfolio includes Intel's FPGA and structured ASIC devices and extensive Software, IP, and Platform offerings. CFDE is responsible for design and implementation of Intel FPGA devices and is at the forefront of FPGA innovation with its next-generation Intel Agilex family of FPGAs that enjoy significant power and performance competitive leadership advantage today. These devices target applications that need flexibility, agility, and high performance in transformative segments of cloud acceleration, data center, edge computing, and networking applications. The design group designs leading edge IPs and SOCs to support Ethernet, PCIe, memory interfaces and of course programmable logic at the leading-edge process nodes. Our world-class engineering team and engineering resources ensure that CFDE will continue to lead and grow as we move forward to extend our FPGA competitive advantage.

 

The Chief of Staff / Technical Assistant directly supports the Vice President of FPGA Design Engineering. The CoS/TA will support all business decision-making processes and ensure smooth, successful execution of all business objectives. This person is expected to be knowledgeable about silicon development processes, detail oriented, ability to bring out critical organizational issues, and drive change in the organization. The person will participate in strategic discussions and decision making along with senior staff.

 

 Responsibilities-

 

 Drive initiatives to increase technical discipline and organizational excellence

 Manage department budget working with CFDE staff and PSG operations managers

 Manage staff operations including agenda setting, strategic topics, business topics, recognitions    Set agenda and drive content creation for all hands meetings

Bring creative ideas to increase employee engagement and reduce attrition levels

Collaborate with representatives from other engineering departments to drive large cross-functional imperatives

 

The successful candidate must demonstrate:

- A combination of business acumen, organization savvy, networking capabilities and expertise to get results across multiple groups and disciplines.

- High exposure to semiconductor chip development processes

- Self-driven individual who can analyze raw data, identify critical issues, and present options for action

- Strong interpersonal and influencing skills

- Ability to synthesize complex information into simpler messages

- Strong written and verbal communication skills. Savvy with delivering key content on Powerpoint and other documentation

- Experience dealing with resource trade-offs, and project outsourcing


Qualifications

Minimum qualifications:

 

- Bachelors or Masters degree in Engineering; Electrical or Computer Science preferred

- Experience in business management / operations in large organizations

- Experience in one or more chip development - architecture, design, verification

- 10+ years of experience in technology industry

Inside this Business Group

The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.


Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.



Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.

Posted: 2022-04-24 Expires: 2022-05-25

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Technical Assistant / Chief of Staff to the Vice President, FPGA Design Engineering, PSG

Intel
San Jose, CA 95113

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