10 days old

Validation/VLSI CAD/Design Engineer

Intel
Hillsboro, OR 97123
  • Job Code
    JR0184976
Job Description

By applying to this posting your resume and profile will become visible to Intel Recruiters / Sourcers and will allow them to consider you for current and future job openings aligned with the skills and positions mentioned above.

Youll be considered for multiple roles within Design Enablement/ LVD: Lead Vehicle Development group, you will join a highly motivated team of talented engineers who design and execute test chips to support all stages of process technology development, they define test chip content that enables yield and performance tracking and add value that enhance speed and quality of yield and debug learning, providing benchmark circuits to monitor and evaluate process maturity.

In this position you will help us with one or more of the following responsibilities:

  • Design and integration of Intels lead technology-development test chips.
  • Define and design test structures needed for process development.
  • Work with TD Process and device experts to define critical Design features and test structures to exercise on the test chips.
  • Develop CAD software/flows that automate physical layout of E-Test Structures
  • Develop layout verification software to implement process design rules using industry standard tools.
  • Digital system design using RTL for implementation through logic synthesis & automatic place-and-route
  • Validate design IP at the IP and system level
  • Develop and utilize various debug and validation tools and/or methodologies to implement validation plans to ensure a solid design

This is an entry level position and will be compensated accordingly.



Qualifications

This requisition has the skillset of different positions under the same opening. Therefore, several hiring managers will have the opportunity to review your profile, if you have one or more of the listed requirements, feel free to apply, you will have the opportunity to showcase your resume to more managers at the same time, a great chance to apply and get matched.

Education and experience that will get you noticed:

You should have Bachelor/Master/PhD in Electrical Engineering, Computer Engineering, Computer Science, or other related Electrical Scientific STEM field.

6+ months of work or educational experience in at least one of the following areas:

  • Computer architecture, RTL, Verilog, System Verilog, exposure to OVM UVM
  • Chip floor planning, layout integration, layout design rules and schematic/layout comparison debug and validation
  • RTL based design, including DFT, system architecture, and integration of various IPs into subsystems
  • Algorithm and programming techniques.
  • Object oriented programming, data structures, algorithms and digital logic.
  • Programming or scripting in Python, Perl, Tcl, SKILL, C++, or Unix shell.

Preferred experience in one or more of the following areas:

  • Knowledge of semiconductor device physics, process scaling, and advanced technology nodes.
  • Industry-standard CAD tools for schematic entry, circuit simulation, custom layout, and design/layout verification, from vendors such as Cadence, Synopsys, and Siemens.
  • Design Compiler (DC), IC Compiler (ICC2), Fusion Compiler (FC), Genus, or Innovus
  • Layout verification using ICV/Calibre.
  • Pre-silicon or post-silicon validation/verification
  • Development of PCells or PyCells

Inside this Business Group

Manufacturing and Product Engineering (MPE) is responsible for test development across product segments, supporting 95% of Intel's revenue. We deliver comprehensive pre-production test suites and component/physical debug capabilities to enable high quality, high volume manufacturing.



Other Locations
US, California, Santa Clara; US, California, Folsom; US, Arizona, Phoenix; US, Texas, Austin;


Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.



Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Posted: 2022-05-15 Expires: 2022-06-15

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Validation/VLSI CAD/Design Engineer

Intel
Hillsboro, OR 97123

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