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Job CodeJR0219852
Come and
join us! Intel is seeking highly qualified candidates to join our
Intel Foundry Services as an Analog Engineer and work
on one of the Several High Speed PHY/Clocking/ADC/Regulators Blocks
with some of the most advanced CMOS processes in the
world.
Responsibilities will include, but are
not limited to:
- Verification lead experience -
will have lead a team of verification engineers to author execution
plans and to complete test plan execution successfully on a mixed
signal IP.
- Experience coding test cases and checkers
(preferably in SystemVerilog and SystemVerilog
Assertions)
- Experience running: volume validation,
coverage, GLS, and mixed-signal equivalence to prove model
quality.
- Experience with analog circuits (clocking
specifically), UVM, SVA, Mixed Signal modeling and verification,
testplan and testbench composition.
The ideal
candidate will have the following skills in addition to the
qualifications listed below.
- Team player, with a
demonstrated experience technically influencing others.
-
Strong problem-solving skills.
- Excellent verbal and
written communication skills.
- Motivation for continuous
skill-development in high-speed/Analog/Mixed signal
design
In this position you will gain invaluable
experience that will allow growth and expanded opportunities across
Intel.
You must possess the below minimum
education requirements and minimum required qualifications to be
initially considered for this position. Additional preferred
qualifications are in addition to the minimum requirements and are
considered a plus factor in identifying top
candidates.
Qualifications
Education
Requirement:
- Bachelor's degree in Electrical
or Electronics Engineering or related field plus 3 years of
industry work experience, or
- Master's degree
in Electrical or Electronics Engineering or related field
- PhD in Electrical or Electronics Engineering
Minimum Required Qualifications:
- Experience in high speed IO Logic Design { Example: PCie,
USB TypeC, HDMi, eDP, Display port, MIPI CPHY/DPHY, Ethernet
PHY}
- IP or SoC development using Verilog/SystemVerilog
in Open Verification Methodology (OVM)/Universal Verification
Methodology (UVM)
- Writing System Verilog Assertions
(SVA)
- Interpreting code coverage results to augment
better design verification outcomes
Additional Preferred Qualifications:
-
Experience with GateKeeper utilities is a plus
-
Experience with PT ECO scripting is a plus.
- Experience
with Perl/TCL scripting is a
plus.
As an integral part of Intel's new IDM2.0 strategy, we establish Intel Foundry Services (IFS), a fully vertical, standalone foundry business, reporting directly to Intel's CEO. IFS will be a world-class foundry business and a major US and European-based capacity provider to serve customers globally. We differentiate IFS with a combination of leading-edge packaging and process technology, committed capacity in the US and Europe, plus a world-class IP portfolio including x86 cores, graphics, media, display, AI, interconnect, fabric, and other critical foundational IP, along with Arm and RISC-V ecosystem IPs. IFS will also provide access to silicon design services to help our customers seamlessly turn silicon into solutions using industry-standard design packages. Intel dedicates IFS to the success of its customers with entire Profit and Loss responsibilities. This model will ensure that our foundry customers' products will receive our utmost focus in terms of service, technology enablement, and capacity commitments. IFS is already engaged with customers today, starting with our existing foundry offerings. We are expanding imminently to include our most advanced technologies optimized for cutting-edge performance, making them ideal for high-performance applications.
Other
Locations
US, California, Santa
Clara
Intel
strongly encourages employees to be vaccinated against COVID-19.
Intel aligns to federal, state, and local laws and as a contractor
to the U.S. Government is subject to government mandates that may
be issued. Intel policies for COVID-19 including guidance about
testing and vaccination are subject to change over
time.
Posting
Statement
All qualified
applicants will receive consideration for employment without regard
to race, color, religion, religious creed, sex, national origin,
ancestry, age, physical or mental disability, medical condition,
genetic information, military and veteran status, marital status,
pregnancy, gender, gender expression, gender identity, sexual
orientation, or any other characteristic protected by local law,
regulation, or
ordinance.
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.
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