16 days old

Xeon Server CPU Performance Validation Engineer

Intel
Austin, TX 78701
  • Job Code
    JR0214207
Job Description

Our Xeon Server Validation Team is seeking Performance Validation Engineers to join us in our quest to ensure no bugs escape to our customers. We are comprised of engineers from a variety of life experiences and perspectives who share this common goal and pursue excellence in doing so. We value our people first and foremost, so we appreciate a "We Over Me" mentality and a demeanor of collaboration and encouragement. We have a robust server roadmap to deliver and therefore need your passion for problem-solving and your expertise.

If you are technically curious and enjoy developing creative solutions to complex problems, then come join us in delivering the highest quality server products to the world. In exchange we offer you the opportunity to collaborate closely with the brightest minds in the industry, and to be a part of the work influencing the technology data revolution. You will enjoy all the growth opportunities available to you at company as expansive and diversified as Intel.

Behavioral Skills We're Looking For:

  • A collaborative and helpful ambition.

  • Creativity.

  • Excellent verbal, written, and interpersonal skills.

  • A growth mindset.

  • Collaboration and teaming skills.

  • Networking, communication and influence skills.


What You Will Do:

  • Create, define and develop performance validation methods and techniques.

  • Write performance validation test SW and automation SW to measure and characterize performance in a highly efficient manner.

  • Characterize and optimize power management architectures against various workloads to improve performance, identify weaknesses, and help drive the direction of new power management ideas in next generation servers.

  • Analyze performance results, collaborating with architecture and design teams to optimize to get the highest levels the performance form Intel's CPUs.

  • Perform Si and platform debug to root-cause issues and enable robust design fixes; design experiments to root cause the issues and collaborate with other teams for debug.

  • Collaborate with architecture, design and pre-silicon validation teams in developing and improving post-silicon performance validation methodologies, test content, and validation techniques, to provide feedback for future on die performance debug features.

  • Test planning, execution monitoring, and reporting test results; drive schedules and issues to closure in high complex scenarios.

  • Collaborate with cross functional HW and SW team to solve complex issues and improve efficiency.

  • Make judgment calls regarding customer deliverables and program level risk assessment from a performance standpoint.

  • Engage with and help resolve customer issues regarding SOC and system performance.

  • Requires broad understanding of multiple system areas and CPU architecture.

  •        Must possess solid initiative, communication skills and willing to work within a diverse team environment.


Qualifications

Educational experience listed below would be obtained through relevant schoolwork, internships, jobs and/or research experience

Minimum Qualifications:

  • The candidate must possess either a BS in Electrical Engineering, Computer Engineering, Computer Science or related field with 4+ years of experience.

OR

  • MS in Electrical Engineering, Computer Engineering, or related field with 3+ years of experience.

  • Debug skills

  • A developed understanding of Computer Architecture and CPU micro-architecture.

  • Experience with Python or C language programming.

  • CPU microarchitectural and/or high-speed bus protocol experience.


Preferred Qualifications:

  • Hands-on experience working with lab equipment, networks, interfaces, (e.g. JTAG, OSC, LA).

  • Familiarity with server or client-specific industry benchmarks and their application to measurement and competitive analyses of performance KPI's.

  • Fundamentals in power and performance architecture, tuning, performance bottleneck analysis, using performance counter monitors.

  • Experience in design verification or validation disciplines, system platform-level debug and root cause isolation methodology and tools.

  • Experience in System/platform-level debug and root cause isolation, methodology and tools (including Logic Analyzers, Protocol Analyzers, Oscilloscopes and Multimeters).

  • Experience with leading automation efforts planning execution and overseeing system validation activities.

  • Deep technical knowledge in performance and power management including understanding of architecture and microcode sufficient to understand potential power and performance impacts of changes.

  • Experience with on-SOC performance counters/measurement features.

Inside this Business Group

In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intels products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moores Law and groundbreaking innovations.  DEG is Intels engineering group, supplying silicon to business units as well as other engineering teams.  As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.



Other Locations

US, Oregon, Hillsboro


Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.



Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.

Posted: 2022-07-31 Expires: 2022-08-31

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Xeon Server CPU Performance Validation Engineer

Intel
Austin, TX 78701

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